Hello,
I'm working with Tricore AURIX TC234.
I'm trying to integrate an RTOS and everything is working until I add DMA transactions to the code application.
Source destination address for the transaction is where two GTM's registers are placed and destination address is where two variables are placed within a section protected by an MPU region.
I think that it shouldn't be an MPU-related problem because we're obtaining a Class 4 Trap, TIN 3 (Store Bus Error).
Trap-related registers contain the following information when it occurs:
DEADD = 0xF0011E02 (Where ECH field from TSR register is placed)
DATR.SBE = 1 (Store Bus Error)
The trap is happening just when we enable the transactions requests writing "1" in ECH.
Searching for this at the reference manual, I've read about the DMA Supervisor/User Mode, and its access protection registers related with their hardware resources' master tags identifiers.
The task within it is occurring is an unprivileged task (running in user mode), and I think that it could be related with.
I've tried to change the Hardare Resource 0 (Where used DMA channels are assigned) to User Mode (set in supervisor mode by default) but then, I'm having same Class 4 Trap, TIN 3 just when we try to write on MODE0.MODE bit.
Please notice that all fields within ACCEN0 are set to Enable.
How could it be related with my problem? Am I understanding something wrong?
Thanks.
I'm working with Tricore AURIX TC234.
I'm trying to integrate an RTOS and everything is working until I add DMA transactions to the code application.
Source destination address for the transaction is where two GTM's registers are placed and destination address is where two variables are placed within a section protected by an MPU region.
I think that it shouldn't be an MPU-related problem because we're obtaining a Class 4 Trap, TIN 3 (Store Bus Error).
Trap-related registers contain the following information when it occurs:
DEADD = 0xF0011E02 (Where ECH field from TSR register is placed)
DATR.SBE = 1 (Store Bus Error)
The trap is happening just when we enable the transactions requests writing "1" in ECH.
Searching for this at the reference manual, I've read about the DMA Supervisor/User Mode, and its access protection registers related with their hardware resources' master tags identifiers.
The task within it is occurring is an unprivileged task (running in user mode), and I think that it could be related with.
I've tried to change the Hardare Resource 0 (Where used DMA channels are assigned) to User Mode (set in supervisor mode by default) but then, I'm having same Class 4 Trap, TIN 3 just when we try to write on MODE0.MODE bit.
Please notice that all fields within ACCEN0 are set to Enable.
How could it be related with my problem? Am I understanding something wrong?
Thanks.