Hi,
It is possible to read (parallel in time) 4 pcs of AD-Converters ( like AD7961 ...18 bit) so, that all 4 have together SPI_CLK and each one of AD-Converters has own MISO-line.
We will have after SPI-read-cycle in FIFO data ordenly in words..
It meas for example in dword x (32-bit packet) data from ADconv1, in dword (x+2n) data from ADconv2 , in dword (x+4n) data from ADconv3, and in dword (x+6n) data from ADconv4
zbyno
It is possible to read (parallel in time) 4 pcs of AD-Converters ( like AD7961 ...18 bit) so, that all 4 have together SPI_CLK and each one of AD-Converters has own MISO-line.
We will have after SPI-read-cycle in FIFO data ordenly in words..
It meas for example in dword x (32-bit packet) data from ADconv1, in dword (x+2n) data from ADconv2 , in dword (x+4n) data from ADconv3, and in dword (x+6n) data from ADconv4
zbyno