Hi,
I think pages 21-20 through 21-22 in the reference manual might answer your question. The cascaded shadow transfer timing diagram from the reference manual is shown below.
Attachment 2310
The diagram and the manual explain it in more detail, but to me it seems like there's a mechanism that would enable shadow transfer on each consecutive slice (i.e. 0 -> 1 -> 2, etc.) only after the shadow transfer on the previous slice occured, regardless of the SxSS status bit (you can see that they are all set at the same time on each of the cascaded slices, but shadow transfer triggers have no effect until the shadow update on the previous slice has occured). Otherwise, the shadow transfer trigger seems to remain the same - register update occurs only on period or one match (on the attached diagram when the timer counter reaches the value of '1').
Best regards,
Andrey
I think pages 21-20 through 21-22 in the reference manual might answer your question. The cascaded shadow transfer timing diagram from the reference manual is shown below.
Attachment 2310
The diagram and the manual explain it in more detail, but to me it seems like there's a mechanism that would enable shadow transfer on each consecutive slice (i.e. 0 -> 1 -> 2, etc.) only after the shadow transfer on the previous slice occured, regardless of the SxSS status bit (you can see that they are all set at the same time on each of the cascaded slices, but shadow transfer triggers have no effect until the shadow update on the previous slice has occured). Otherwise, the shadow transfer trigger seems to remain the same - register update occurs only on period or one match (on the attached diagram when the timer counter reaches the value of '1').
Best regards,
Andrey