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Multiple ADC channels sensing Problem

April 23, 2018, 6:05 am
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We are presently working on V/f control of inverter using space vector PWM technique. Along with that I am reading and calculating RMS values Line to Line voltages and line currents. I am even calculating the mean values of DC bus and DC current.

We are using XMC4400 F100X256 with P14.6, P14.7,P14.8 for line currents sensing, P14.9,P14.12, P14.13 for the line to line voltages sensing, P15.2, P15.3 for half DC bus sensing and P15.8 for DC current sensing.

The space vector PWM is generated using 2 PWM_CCU8 APPs operating in center aligned mode. I am updating the timing for each sample in space vector, using the event form compare 2 match while counting down(By setting the unused compare 2 register as least compare value possible). The SPACE VECTOR PWM is working fine and giving desired results.

Now I am using 4 ADC_MEASUREMENT_ADV APPs in SCAN SOURCE MODE for measuring since channels are in different ADC groups (P14.6, P14.7 in GROUP -0, P14.8 , P14.9,P14.12,P14.13 in GROUP -1, P15.2,P15.3 in GROUP-2 and P15.8 in GROUP-3). For 3 cycles of the centre aligned clock of PWM_CCU8 APP I am taking 1 sample of all these measurements. With 1st Timing cycle taking sample of all the line to line voltages, in the 2nd cycle the DC voltage and DC current and in the 3rd Timing cycle taking sample of all the line currents. I am triggering the ADC conversion of each group using software. I am generating a result event using the last channel of each group. With the interrupt service routine I am performing RMS values calculations. As of now I am assuming 50Hz frequency of the AC signals measured. So while calculating RMS values the number of samples taken over each cycle is 66 (For a switching frequency in Space vector as 9900Hz).

The Space vector PWM is working fine and output is also tested in hardware. But When I am trying to measure the line voltages and watch the corresponding expression in DAVE the line voltages and Total DC bus is coming correctly. But the Line currents, Positive DC bus voltage and DC bus current are showing same incorrect value over and over again even when I change the parameters. I have been playing around in DAVE trying all possible settings without any form of success. Also been reading the Device Guide for the ADC, but it has not brought me any closer.

Any suggestions, comments or help is welcome!
?????
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Dave 4.4.2 Memory Settings Page missing

April 24, 2018, 12:05 am
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Hi Val-R!
Indeed window is read only.
You could modify Memory under
select by right mouse key your "Project[Active-Debug]" and step to "DAVE PROJECT UPGRADE", select "DEVICE UPGRADE" ; here you could select another µC but don't forget to select "MIGRATE".
If you intend to enable printf or scanf, it is possible to do this under
select by right mouse key your "Project[Active-Debug]" and step to "PREFERENCES", select "C/C++ Build" --> Settings-->ARM-GCC Linker -->General --> mark your options
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WAKE UP from Sleep Mode ( XMC1201 )

April 20, 2018, 7:23 am
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Hi everyone,

I have put my micro into sleep mode by disabling all the interrupts and using these (_WFI and _disable_irq ) instructions . I am not sure how to wake up my Micro from sleep mode by using interrupt.

Kindly give me some help and suggestions.

Thanks .
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Trigger DMA on ECAT PDI event

April 24, 2018, 12:50 am
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Just in case I overlooked something:
Is there any way to trigger a DMA for the ECAT PDI-Interrputs (AL Event Request) similar to this SYNC0 solution ?
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XMC4500 multiCAN, getting MSGLST in a RXFIFO configuration

April 24, 2018, 1:41 am
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Hello.

Just wanted to check if anyone else is seeing this problem.

We have set up a Gateway node connecting 2 CANnets.
Since the HW Gateway has it quirks http://see https://www.infineonforum...4400-Multican?, we opted for setting up 4 RX FIFOs and let the irq routines do the data shuffling.

This scheme works almost OK, but we are experiencing MSGLST from a MO in the RXFIFO even though the FIFO is not full.
The CAN_RXOF irq is enabled (and tested OK), but is not asserted in these MSGLST cases.
Fault rate is about 1-2 messages in about 40 millions, so the FIFOs wrapps around numerous times. We also have a FIFO highwater-mark monitor, and it shows that the FIFO is filled with max 2 unread messages at the time MSGLST is set.
FIFO sizes vary from 8 to 20 MOs.
Have also implemented a test command where the RX irq routine can skip n readouts, hence filling the FIFO, and that also works fine. Next irq that reads, empties the FIFO.

We are using the MSIMASK/MSID HW registers to find out which FIFO to read from.

In all the multiCAN examples we have come across, there is no examples on how to empty multiple RXFIFO using the MSIMASK/MSID HW registers.

Hoping someone can chime in on this one.

Here is our irq routine:

Code:
    bool receive(CanMessage* msg)
    {
        uint32_t pendingIndex;
        int i;
//        printf("%s:\n", m_owner);
//        printf("MSPND:  %08x %08x\n", CAN->MSPND[1], CAN->MSPND[0]);
//        printf("MSIMASK: %08x %08x\n", m_msimask[1], m_msimask[0]);

        if (m_irqOwner != (uint32_t)(PPB->ICSR & PPB_ICSR_VECTACTIVE_Msk) - 16) {
            Can *can = Can::getInstance();
            can->s_wrongIRQ++;
            return false;
        }

        for (i=0; i<2; i++) {
            CAN->MSIMASK = m_msimask[i];
            pendingIndex = CAN->MSID[i];
//            printf("%-15s[%d] %d\n", "pendingIndex", i, pendingIndex);

            if (pendingIndex == CAN_MSI_NO_PENDING) {
                if (i == 1) {
                    return false;
                }
                else {
                    continue;
                }
            }
            CLR_BIT(CAN->MSPND[i], pendingIndex);
            pendingIndex += 32*i;
            break;
        }
//        printf("%-15s %d\n", "pendingIndex", pendingIndex);
        uint8_t baseIndex = m_messageObjects.front().getNumber();
        XMC_CAN_MO_t* baseMoPtr = m_messageObjects.front().getMoPtr();
        XMC_CAN_FIFO_SetSELMO(baseMoPtr, pendingIndex);
        //printf("%-15s %d\n", "baseIndex", baseIndex);       
        return m_messageObjects[pendingIndex - baseIndex].receive(msg);
    }

    bool receive(CanMessage* msg)
    {
        uint32_t mo_message_lost = (uint32_t)((m_xmcCanMo.can_mo_ptr->MOSTAT) & CAN_MO_MOSTAT_MSGLST_Msk) >> CAN_MO_MOSTAT_MSGLST_Pos;
checkAgain:
        m_xmcCanMo.can_mo_ptr->MOCTR = CAN_MO_MOCTR_RESNEWDAT_Msk | CAN_MO_MOCTR_RESRXPND_Msk; // reset NEWDAT & RXPND

        if ((((m_xmcCanMo.can_mo_ptr->MOAR) & CAN_MO_MOAR_IDE_Msk) >> CAN_MO_MOAR_IDE_Pos) == 1U) { // 29-bit ID
            uint32_t identifier = (m_xmcCanMo.can_mo_ptr->MOAR & CAN_MO_MOAR_ID_Msk);
            newCanMessage(msg, identifier & 0x000000ff);
            msg->size      = (uint8_t)((uint32_t)((m_xmcCanMo.can_mo_ptr->MOFCR) & CAN_MO_MOFCR_DLC_Msk) >> CAN_MO_MOFCR_DLC_Pos);
            msg->identifier = identifier;
            msg->nodeNum    = (identifier & 0x0000ff00) >> 8;
            uint32_t* dataPtr = reinterpret_cast<uint32_t*>(msg->data);
            if (msg->size > 0) {
                dataPtr[0] = m_xmcCanMo.can_mo_ptr->MODATAL;
            }
            if (msg->size > 4) {
                dataPtr[1] = m_xmcCanMo.can_mo_ptr->MODATAH;
            }
        }

        uint32_t mo_new_data_available = (uint32_t)((m_xmcCanMo.can_mo_ptr->MOSTAT) & CAN_MO_MOSTAT_NEWDAT_Msk) >> CAN_MO_MOSTAT_NEWDAT_Pos;
        uint32_t mo_recepcion_ongoing = (uint32_t)((m_xmcCanMo.can_mo_ptr->MOSTAT) & CAN_MO_MOSTAT_RXUPD_Msk) >> CAN_MO_MOSTAT_RXUPD_Pos;

        if ((mo_new_data_available) || (mo_recepcion_ongoing)) {
            Can::s_checkedAgain++;
            goto checkAgain;
        }

        if (mo_message_lost) {
            m_xmcCanMo.can_mo_ptr->MOCTR = CAN_MO_MOCTR_RESMSGLST_Msk; // reset lost bit
            if (Can::s_gatewayEnabled) {
                if ((m_number>=CAN_RX12_MOSTART) && (m_number<=CAN_RX12_MOEND)) {
                    Can::s_lostCntr1++;
                } else {
                    if ((m_number>=CAN_RX2_MOSTART) && (m_number<=CAN_RX2_MOEND)) {
                        Can::s_lostCntr2++;
                    }
                }
            } else {
                if ((m_number>=CAN_RX_MOSTART) && (m_number<=CAN_RX_MOEND)) {
                    Can::s_lostCntr1++;
                }
            }
            //            panic_printf(PANIC_USER, "CAN MSG LOST, MO%02d, idle %d%%", m_number, getIdlePercent());
            ////            panic_printf(PANIC_USER, "LOST MO%02d %08x %08x", m_number, CAN->MSPND[1], CAN->MSPND[0]);
            ////            printf("\n\nLOST MO%02d %08x %08x\n\n", m_number, CAN->MSPND[1], CAN->MSPND[0]);
            //            return false;
        }


        //        if (mo_recepcion_ongoing) {
        //            panic_printf(PANIC_USER, "CAN MSG RX BUSY, MO%02d", m_number);
        //        }

        return true;
    }
(Also opened a support case: Case:3740999)
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Forum suddenly Chinesifies. (Chrome & Edge)

April 24, 2018, 2:15 am
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Forum suddenly Chinesifies (Chrome & Edge)

April 24, 2018, 2:18 am
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WAKE UP from Sleep Mode ( XMC1201 )

April 20, 2018, 7:23 am
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Hi everyone,

I have put my micro into sleep mode by disabling all the interrupts and using these (_WFI and _disable_irq ) instructions . I am not sure how to wake up my Micro from sleep mode by using interrupt.

Kindly give me some help and suggestions.

Thanks .
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Forum suddenly Chinesifies. (Chrome & Edge)

April 24, 2018, 2:15 am
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Forum suddenly Chinesifies (Chrome & Edge)

April 24, 2018, 2:18 am
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problem jump to an external address function

April 24, 2018, 3:48 am
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Hi,

I have a problem with a piece of code written in startup_XMC4400.S:
I need to jump to an external init function with a well know address before jump in main, so:
+ ldr r0, =0x0C020200
+ blx r0

ldr r0, =main
blx r0

When I debug step by step (step into) that works but if I press continue to run this code, it fails (VAC0_G3_3_IRQ_Handler crash).

I don't understand why this work step by step and crash in free running.

How can i do to investigate/solve this problem?
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Operating XMC1300 ADC in slow standby mode

April 24, 2018, 3:53 am
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Dear Jason,

I assume the reason is the wake up time for the analog part of the ADC.
The wake up time is approximately 15us.
To compensate the wake up time you can extend the sampling time.

Atached a project to do so:

* This example shows the use case of Slow Standby mode (ANONS = 01B).
* The converter enters a power save mode while no activity is required. It automatically
* returns to normal operation if a conversion is requested.
* The wake up time is approximately 15μs.
* (With the APP the sampling time is set to ~15us.)
*
* The PWM_CCU4_0 is gating the ADC measurement with 1 Hz and 50% DC. So the project is sampling 500ms and 500ms in power down.
* In the picture output.jpg you can see that the ADC resultA is not changed in the first half and permanently updated in the second half.
*
* The CCU4_1 is capturing the Timer value and the ADC resultA in a 1kHz time frame. Also the uC Probe update is handled in this ISR.
*
* As input the Potentiometer at P2.5 at the BootKitXMC1300 is used.

Best Regards
Eric
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How to implement 32bit timer for TC26x B-Step 32bit microcontrolller

April 24, 2018, 5:46 am
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Hi everyone,

For my project i need to implement 32bit timer , TC26x doesn't have timer but it has counter. How can i do that , can you please help me out.


Thanks
kriz
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Forum suddenly Chinesifies. (Chrome & Edge)

April 24, 2018, 2:15 am
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Forum suddenly Chinesifies (Chrome & Edge)

April 24, 2018, 4:41 am
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TLE987X NAC/NAD Value at NVM

April 24, 2018, 5:20 pm
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Hi

I want change NAC_NAD value when device is running. so I try to change it using "sector erase" but, it was not changed.

as I know, these value at NVM(end of memory) so I think it is possible.

How I can changed it? is there some other function for it?(I using bootrom.c functions.)

Would you check this one?

Thanks.
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Synchronization of two timers in center aligned mode to have dead time

April 25, 2018, 5:53 am
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Hi,

you can use the PWM_CCU4 APP for timer configuration.
In the APP help is a picture to configure external event (secound tab).

You should set one event as external start and and aktivate "synchronous Start".
The function XMC_SCU_SetCcuTriggerHigh() can then set the respective Bit in the SCU_GENERAL->CCUCON register.

If you are using a XMC1300 device you can use the CCU8 with integrated dead time control.

Best Regards
Eric
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Forum suddenly Chinesifies. (Chrome & Edge)

April 24, 2018, 2:15 am
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Forum suddenly Chinesifies (Chrome & Edge)

April 24, 2018, 4:41 am
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Trigger DSD Integrator from CCU8

April 26, 2018, 12:22 am
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Hi All,

im trying to implement a dsd sampling in sync with the pwm of several already synced ccu8 slices.

The ccu8 slice 0 generates an event for period match and upcounting 1 which i use to triggern an interrupt.
The dsd is configured with additional integrator with 1 blanking sample and as a start 2 integration samples. If i set it to trigger allways every thing works as expected.

What i do not get from the dsd app note and the rm is how to route the CCU8 interrupt event to the dsd integrators trigger input. Does any one have an XMC Lib example for this?

I tryed to use CCU80 ST0 status routed by the ERU to the dsd integrator but i seem to miss something. Please see the code below.

pwm init code:
Code:
const XMC_SCU_CLOCK_CONFIG_t clock_config =
{
    .syspll_config.n_div = 80U,
    .syspll_config.p_div = 2U,
    .syspll_config.k_div = 4U,
    .syspll_config.mode = XMC_SCU_CLOCK_SYSPLL_MODE_NORMAL,
    .syspll_config.clksrc = XMC_SCU_CLOCK_SYSPLLCLKSRC_OSCHP,
    .enable_oschp = true,
    .enable_osculp = false,
    .calibration_mode = XMC_SCU_CLOCK_FOFI_CALIBRATION_MODE_FACTORY,
    .fstdby_clksrc = XMC_SCU_HIB_STDBYCLKSRC_OSI,
    .fsys_clksrc = XMC_SCU_CLOCK_SYSCLKSRC_PLL,
    .fsys_clkdiv = 1U,
    .fcpu_clkdiv = 1U,
    .fccu_clkdiv = 1U,
    .fperipheral_clkdiv = 1U
};

const XMC_CCU8_SLICE_COMPARE_CONFIG_t slice_config =
{
    .timer_mode = (uint32_t)XMC_CCU8_SLICE_TIMER_COUNT_MODE_CA,
    .monoshot = (uint32_t)XMC_CCU8_SLICE_TIMER_REPEAT_MODE_REPEAT,
    .shadow_xfer_clear = 0U,
    .dither_timer_period = 0U,
    .dither_duty_cycle = 0U,
    .prescaler_mode = (uint32_t)XMC_CCU8_SLICE_PRESCALER_MODE_NORMAL,
    .mcm_ch1_enable = 0U,
    .mcm_ch2_enable = 0U,
    .slice_status = (uint32_t)XMC_CCU8_SLICE_STATUS_CHANNEL_1,
    .passive_level_out0 = (uint32_t)XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW,
    .passive_level_out1 = (uint32_t)XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW,
    .passive_level_out2 = (uint32_t)XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW,
    .passive_level_out3 = (uint32_t)XMC_CCU8_SLICE_OUTPUT_PASSIVE_LEVEL_LOW,
    .asymmetric_pwm = 0U,
    .invert_out0 = 0U,
    .invert_out1 = 1U,
    .invert_out2 = 0U,
    .invert_out3 = 1U,
    .prescaler_initval = 0U,
    .float_limit = 0U,
    .dither_limit = 0U,
    .timer_concatenation = 0U,
};

const XMC_CCU8_SLICE_EVENT_CONFIG_t slice_event0_config =
{
    .mapped_input = XMC_CCU8_SLICE_INPUT_H, //Connected to SCU.GSC80
    .edge = XMC_CCU8_SLICE_EVENT_EDGE_SENSITIVITY_RISING_EDGE,
    .level = XMC_CCU8_SLICE_EVENT_LEVEL_SENSITIVITY_ACTIVE_LOW,
    .duration = XMC_CCU8_SLICE_EVENT_FILTER_DISABLED,
};

void initialize(void)
{
        XMC_GPIO_CONFIG_t config;

  /* Ensure clock frequency is set at 120 MHz */
  XMC_SCU_CLOCK_Init(&clock_config);

  /* Enable CCU8 module */
  XMC_CCU8_Init(CCU80, XMC_CCU8_SLICE_MCMS_ACTION_TRANSFER_PR_CR);

  /* Start the prescaler */
  XMC_CCU8_StartPrescaler(CCU80);

  /* Ensure fCCU reaches CCU80 */
  XMC_CCU8_SetModuleClock(CCU80, XMC_CCU8_CLOCK_SCU);

  /* Configure CCU8x_CC8y slice as timer */
  XMC_CCU8_SLICE_CompareInit(CCU80_CC80, &slice_config);
  XMC_CCU8_SLICE_CompareInit(CCU80_CC82, &slice_config);
  XMC_CCU8_SLICE_CompareInit(CCU80_CC83, &slice_config);

  /* Set period match value of the timer */
  XMC_CCU8_SLICE_SetTimerPeriodMatch(CCU80_CC80, 1249U);
  XMC_CCU8_SLICE_SetTimerPeriodMatch(CCU80_CC82, 1249U);
  XMC_CCU8_SLICE_SetTimerPeriodMatch(CCU80_CC83, 1249U);

  /* Set timer compare match valuew for channel 1 Duty Cycle */
  XMC_CCU8_SLICE_SetTimerCompareMatch(CCU80_CC80,XMC_CCU8_SLICE_COMPARE_CHANNEL_1, 750U);
  XMC_CCU8_SLICE_SetTimerCompareMatch(CCU80_CC82,XMC_CCU8_SLICE_COMPARE_CHANNEL_1, 750U);
  XMC_CCU8_SLICE_SetTimerCompareMatch(CCU80_CC83,XMC_CCU8_SLICE_COMPARE_CHANNEL_1, 750U);

  /* Transfer value from shadow timer registers to actual timer registers */
  XMC_CCU8_EnableShadowTransfer(CCU80, XMC_CCU8_SHADOW_TRANSFER_SLICE_0);
  XMC_CCU8_EnableShadowTransfer(CCU80, XMC_CCU8_SHADOW_TRANSFER_SLICE_2);
  XMC_CCU8_EnableShadowTransfer(CCU80, XMC_CCU8_SHADOW_TRANSFER_SLICE_3);

  /* Configure events */
  XMC_CCU8_SLICE_ConfigureEvent(CCU80_CC80, XMC_CCU8_SLICE_EVENT_0, &slice_event0_config);
  XMC_CCU8_SLICE_ConfigureEvent(CCU80_CC82, XMC_CCU8_SLICE_EVENT_0, &slice_event0_config);
  XMC_CCU8_SLICE_ConfigureEvent(CCU80_CC83, XMC_CCU8_SLICE_EVENT_0, &slice_event0_config);

  XMC_CCU8_SLICE_StartConfig(CCU80_CC80, XMC_CCU8_SLICE_EVENT_0, XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR);
  XMC_CCU8_SLICE_StartConfig(CCU80_CC82, XMC_CCU8_SLICE_EVENT_0, XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR);
  XMC_CCU8_SLICE_StartConfig(CCU80_CC83, XMC_CCU8_SLICE_EVENT_0, XMC_CCU8_SLICE_START_MODE_TIMER_START_CLEAR);

  /* Enable events */
  XMC_CCU8_SLICE_EnableEvent(CCU80_CC80, XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH);
  XMC_CCU8_SLICE_EnableEvent(CCU80_CC80, XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH);

  /* Connect period match and one match event to SR0 */
  XMC_CCU8_SLICE_SetInterruptNode(CCU80_CC80, XMC_CCU8_SLICE_IRQ_ID_PERIOD_MATCH, XMC_CCU8_SLICE_SR_ID_0);
  XMC_CCU8_SLICE_SetInterruptNode(CCU80_CC80, XMC_CCU8_SLICE_IRQ_ID_ONE_MATCH, XMC_CCU8_SLICE_SR_ID_0);
  /* Set NVIC priority */
  NVIC_SetPriority(CCU80_0_IRQn, 63U);
  /* Enable IRQ */
  NVIC_EnableIRQ(CCU80_0_IRQn);

  /* Get the slice out of idle mode */
  XMC_CCU8_EnableClock(CCU80, 0U);
  XMC_CCU8_EnableClock(CCU80, 2U);
  XMC_CCU8_EnableClock(CCU80, 3U);

  /* Start the PWM on a rising edge on SCU.GSC80 */
  XMC_SCU_SetCcuTriggerHigh(XMC_SCU_CCU_TRIGGER_CCU80);
dsd init code:
Code:
const XMC_DSD_CH_FILTER_CONFIG_t filter_config0 = {
    .clock_divider = XMC_DSD_CH_CLK_DIV_2,
    .clock_source = XMC_DSD_CH_CLOCK_SOURCE_A,
    .data_source = XMC_DSD_CH_DATA_SOURCE_A_DIRECT,
    .decimation_factor = 32U,
    .filter_start_value = 32U,
    .filter_type = XMC_DSD_CH_FILTER_TYPE_CIC3,
    .offset = 0U,
    .result_event = XMC_DSD_CH_RESULT_EVENT_DISABLE,
    .strobe = XMC_DSD_CH_STROBE_DIRECT_CLOCK_RISE,
};

const XMC_DSD_CH_FILTER_CONFIG_t filter_config1 = {
      .clock_divider = XMC_DSD_CH_CLK_DIV_2,
      .clock_source = XMC_DSD_CH_CLOCK_SOURCE_B,
      .data_source = XMC_DSD_CH_DATA_SOURCE_B_DIRECT,
      .decimation_factor = 32U,
      .filter_start_value = 32U,
      .filter_type = XMC_DSD_CH_FILTER_TYPE_CIC3,
      .offset = 0U,
      .result_event = XMC_DSD_CH_RESULT_EVENT_DISABLE,
      .strobe = XMC_DSD_CH_STROBE_DIRECT_CLOCK_RISE,
};

const XMC_DSD_CH_FILTER_CONFIG_t filter_config2 = {
      .clock_divider = XMC_DSD_CH_CLK_DIV_2,
      .clock_source = XMC_DSD_CH_CLOCK_SOURCE_A,
      .data_source = XMC_DSD_CH_DATA_SOURCE_A_DIRECT,
      .decimation_factor = 32U,
      .filter_start_value = 32U,
      .filter_type = XMC_DSD_CH_FILTER_TYPE_CIC3,
      .offset = 0U,
      .result_event = XMC_DSD_CH_RESULT_EVENT_DISABLE,
      .strobe = XMC_DSD_CH_STROBE_DIRECT_CLOCK_RISE,
};

const XMC_DSD_CH_INTEGRATOR_CONFIG_t integrator_config = {
    .counted_values = 2,
    .discarded_values = 1,
    .integration_loop = 1,
    .integrator_trigger = XMC_DSD_CH_TRIGGER_SOURCE_B,
    .start_condition = XMC_DSD_CH_INTEGRATOR_START_TRIGGER_RISE,
    .stop_condition = XMC_DSD_CH_INTEGRATOR_STOP_END_OF_LOOPS,
};



XMC_ERU_ETL_CONFIG_t pwm_event_generator =
{
  .input = ERU1_ETL0_INPUTB_CCU80_ST0,
  .source = XMC_ERU_ETL_SOURCE_B,
  .edge_detection = XMC_ERU_ETL_EDGE_DETECTION_RISING,
  .status_flag_mode = XMC_ERU_ETL_STATUS_FLAG_MODE_HWCTRL,
  .enable_output_trigger = true,
  .output_trigger_channel = XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1
};

void initialize(void)
{
  XMC_DSD_Enable(DSD);
  XMC_DSD_EnableClock(DSD);

  XMC_DSD_CH_MainFilter_Init(DSD_CH0, &filter_config0);
  XMC_DSD_CH_MainFilter_Init(DSD_CH1, &filter_config1);
  XMC_DSD_CH_MainFilter_Init(DSD_CH2, &filter_config2);

  XMC_DSD_CH_Integrator_Init(DSD_CH0, &integrator_config);
  XMC_DSD_CH_Integrator_Init(DSD_CH1, &integrator_config);
  XMC_DSD_CH_Integrator_Init(DSD_CH2, &integrator_config);

  XMC_ERU_ETL_Init(ERU0_ETL1, &pwm_event_generator);


  XMC_DSD_Start(DSD, XMC_DSD_CH_ID_0 | XMC_DSD_CH_ID_1 | XMC_DSD_CH_ID_2);

}
regards

Alex
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