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XMC4500 (100 Pin) single phase shift dual active bridge

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Hallo ,

to controle a dual active bridge, i need 8 PWM signals , as you can see in the picture below,every two MOSFET blong to a group from A to D. HSX (high side) and LSX (low side)
need a dead time between the transitions, plus the secondary bridge ( C and D) need to be phase shifted. I'm wondering if mixing CCU80 and CCU81
(A -----> CCU80.out20/CCU80.out21, B -----> CCU81.out00/CCU81.out01, C -----> CCU80.out30/CCU80.out31 and D -----> CCU81.out20/CCU81.out21)
will create a communication problems and Deficiency in generating the PWM signals.

Best regards,

Fethi

Attachment 3491
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XMC4500 multiCAN, getting MSGLST in a RXFIFO configuration

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This was not the silver bullet we hoped for.
Our problem with 'false' MSG_LOST continued.
Then we realised we were on version 2.1.8 of XMClib.
Stepping to 2.1.18 with the change introduced to void XMC_CAN_MO_Config(const XMC_CAN_MO_t *const can_mo) seemed to do the trick.

Problem was that TX events was enabled on RX MOs and visa versa. That was why this problem was only an issue on our gateway nodes. They have a lot of continuous TX & RX, on both the CAN1 & CAN2 modules.

TX and RX port impedance of BGT24LTR11N16 ?

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As said in the datasheet the impedance is characterized as 50Ohm with the test condition for TX/RX: Including TX/RX port matching structure according to AN472. See AN472 Section 3.

Locked Aurix 23x

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Hello,
boths BMHD are invalid and ignored during startup. This should not lock the device. You can check this with the ESR0 signal. If ESR0 is always low then the device is locked. If the ESR0 is always high (external pull-up on this pin is needed) after power on reset and the debugger can't access then the device is in the Generic Bootstraploader and wait for data via ASC/CAN.
Which board you are using? How are the external connections on P14.3, P10.5 and P10.6?

When all BMHD in TC275 fail, can I still connect devices via Generic BSL mode?

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Hello,
what is the external connection on P14.3 (HWCFG3)? External pins (P10.5, P10.6) are only evaluated when HWCFG3 is low during reset and bit PINDIS is not set in a valid BMHD.

Ethernet issue with TC 279x (SMI/MDIO interface)

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Hello,
you must set the P12.0 to ETHMDC. P12.0 is the clock and P12.1 is the data line for MAC I/O. I expect that you will use this pins with this functionality.
Please see also table 34-53. You must set P12_IOCR0.PC0 = 10110B then you get an output clock and you can access your PHY.

Mini Wiggler and TC1796

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Hello,
per default is the miniWiggler in DAP mode and expect a device which is able to communicate via DAP. TC1796 has only JTAG, therefore the CPU can't answer the DAP telegrams. You must switch the miniWiggler in JTAG mode. If you don't have the 20 pin JTAG connector on your board and can't connect 1:1 (this is was I expect) then you must set the miniWiggler to JTAG mode by connect pin 19 of the 20 pin JTAG connector to ground. Pin 17 of the connector is e.g. ground.
I am not sure that the latest UDAS supports the TC1796 but you can check this by the described solution.

Trigger Pulse for SENT/SPC Protocol in by Aurix MCU

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Hello,
the pin must be set to corresponding alternate output (SPC) with open drain. External pull up is needed. Trigger pulses can be generated by write to SENT_SCRx register. See chapter SPC Operation for more Information in the device user manual.

XMC4500 (100 Pin) single phase shift dual active bridge

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Hallo ,

to controle a dual active bridge, i need 8 PWM signals , as you can see in the picture below,every two MOSFET blong to a group from A to D. HSX (high side) and LSX (low side)
need a dead time between the transitions, plus the secondary bridge ( C and D) need to be phase shifted. I'm wondering if mixing CCU80 and CCU81
(A -----> CCU80.out20/CCU80.out21, B -----> CCU81.out00/CCU81.out01, C -----> CCU80.out30/CCU80.out31 and D -----> CCU81.out20/CCU81.out21)
will create a communication problems and Deficiency in generating the PWM signals.

Best regards,

Fethi

Attachment 3491
?????

Ethernet issue with TC 279x (SMI/MDIO interface)

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Hello,
you must set the P12.0 to ETHMDC. P12.0 is the clock and P12.1 is the data line for MAC I/O. I expect that you will use this pins with this functionality.
Please see also table 34-53. You must set P12_IOCR0.PC0 = 10110B then you get an output clock and you can access your PHY.

XC164 - first and second stage bootloader binary or code as used in memtool

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Hey at all,

I want to program the XC164-16 via another µC. I want to use the BSL/ASC protocol over UART. I found information in application notes that state that therefore a first and second stage bootloader must be programmed on the XC164-16 before the application data can be programmed. I also found out that memtool contains the mentioned first and second stage bootloader.

Is there any way to get the binaries/source code of the first and second stage bootloader used by memtools?

Best

Phil

TC277 JTAG locked

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Hello All,

I am facing problem with respect to JTAG while trying to connect using UDE debugger.
Error says JTAG Interface is locked. This microcontroller is a new device which has not been programmed before.
How do i unlock this JTAG?
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FAQ for integrated voltage regulators (VDDP, VDDEXT, VDDC)

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This thread is a collection of voltage regulator related questions.

FAQ for miscellaneous ePower Topics

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FAQ for miscellaneous ePower Topics.

XMC4800 Interrupt by RTC_XTAL1

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Hi,

unfortunately, I don´t have a complete working solution but I guess it´s better to show you how it could be realized. Maybe you also notice some small detail that I missed.

Code:

#include "xmc_scu.h"
#include "xmc_gpio.h"
#include "xmc_eru.h"

const XMC_ERU_ETL_CONFIG_t eru_etl_config =
{
  .input_b = ERU0_ETL1_INPUTB_SCU_HIB_SR1,
  .enable_output_trigger = 1,
  .output_trigger_channel = XMC_ERU_ETL_OUTPUT_TRIGGER_CHANNEL1,
  .source = XMC_ERU_ETL_SOURCE_B,
  .status_flag_mode = XMC_ERU_ETL_STATUS_FLAG_MODE_SWCTRL,
  .edge_detection = XMC_ERU_ETL_EDGE_DETECTION_FALLING
};

const XMC_ERU_OGU_CONFIG_t eru_ogu_config =
{
  .peripheral_trigger        = 0U, /* OGU input peripheral trigger */
  .enable_pattern_detection  = false, /* Enables generation of pattern match event */
  .service_request            = XMC_ERU_OGU_SERVICE_REQUEST_ON_TRIGGER, /* Interrupt gating signal */
  .pattern_detection_input    = 0U
};

void IRQ_Hdlr_2 (void)
{
        uint8_t index;

        index = 0;                        // used just to set the breakpoint, unfortunately this point in code is not reached
}

int main(void)
{
  XMC_ERU_ETL_Init(XMC_ERU0, 1, &eru_etl_config);
  XMC_ERU_OGU_Init(XMC_ERU0, 1, &eru_ogu_config);

  XMC_SCU_HIB_RTCCLKSRC_t currentStdbyClock;

  if (XMC_SCU_HIB_IsHibernateDomainEnabled() == false)
  {
          XMC_SCU_HIB_EnableHibernateDomain();
  }

  XMC_SCU_CLOCK_EnableLowPowerOscillator();

  // this part is added just for testing, enabling low power EXTERNAL oscillator should be sufficient
  XMC_SCU_HIB_SetStandbyClockSource(XMC_SCU_HIB_STDBYCLKSRC_OSCULP);
  XMC_SCU_HIB_SetRtcClockSource(XMC_SCU_HIB_RTCCLKSRC_ULP);

  currentStdbyClock = XMC_SCU_HIB_GetStdbyClockSource();

  NVIC_SetPriority((IRQn_Type)2, NVIC_EncodePriority(NVIC_GetPriorityGrouping(), 63, 0));
  NVIC_EnableIRQ((IRQn_Type)2);

  /* Loop forever */
  while (1)
  {

  }
}

The code doesn´t reach interrupt routine and there is not even status flag set which will signify that falling edge is detected. I´ve tried also with rising and both edges and it doesn´t seem to have an impact. When I tried the use some of the buttons with similar code (different board, different input pin, different ERU module and different interrupt service routine) I was successful, which may me lead that maybe the voltage level transition on a RTC_XTAL1 pin are not sufficient to trigger ERU module edge detection. But again, maybe this is working fine but there are some issues with initialization which currently I don´t see. So try it by yourself and see if you see some issues with the code.

Best regards,
Deni

Where/how to get DEMO_5QR4770AG_15W1 evaluation board?

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Any distributor in your region should be able to deliver the DEMO_5QR4770AG_15W1 (SP001710132), maybe the distributor will have to order the board at Infineon himself. For distributor contact please visit https://www.infineon.com/disti.

How to get the source code of 3D Magnetic Sensor 2Go built-in firmware?

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Same question here.
Would like to modify it a bit :)

XMC4700. UART receive timeout interrupt - is it possible to?

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I can attach max 5 files per post so new post to finish things off...

Here you can also see the report where is visible which modules have been used by the DAVE for this example and how the signal routing has been done:

Attachment 3500
Attachment 3501

This is the idea how it can be done, of course it needs to be arranged for your use case but it should work.

Best regards,
Deni

Infineon Distance2Go-module (XMC4200-256) questions

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Hi Bram,

May I know which SW version have you flashed onto the board?
It will be useful too for you to register an account so that you can have the latest versions of the SW.
You can follow the instructions at this link (https://www.infineon.com/dgdl/Infine...5ba9902d661384), if you have not already done so previously.

Hopefully this helps. All the best :)

CCU - Error in count from UP to DOWN

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I noticed a defect verified both in CCU4 and in CCU8, both on XMC1404 and on XMC4700.
The defect is as follows: I have to generate a pulse exactly 2 clock wide in both count directions, but when I count UP the pulse is right, but when I count DOWN the pulse becomes 3 clock wide.

When the count UP:
Attachment 3504

When the count DN:
Attachment 3505

I created a small project to prove the defect (see attached file): you can use the XMC1400 Boot Kit.
This is the configuration with DAVE:
Attachment 3503

Connect oscilloscope to outputs P1.0 (Clock output) and P1.1 (pulse output). Then use an electric wire connected to input P0.12 to reverse the counter direction (open: UP counter, connected to Vdd: DN counter).

Why does this happen? It's not normal. According to what is written in the reference manual of CCU4 (or CCU8) this anomaly should not occur.

Regards
Andrea
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