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Groovy object not found after import from Git-Repository

May 8, 2019, 2:58 am
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Hello,

I still face the same problem with Git even if the projectData.bin and .dep and .app files are also part of the Git commit. The Groovy object not found error still persists.
Are there any other options to check? By the way I think using Git should work out of the box for the IDE even if it is free.
Can anyone please help.

Best regards
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TC27X Program Flash AC_PF0 (0x80000000-)

May 8, 2019, 3:48 am
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Segment 8 and A are identically. For programming address 0x8xxxxxxx you must change the segment from 8 to A and program 0xAxxxxxxx instead of 0x8xxxxxxx.
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SMU configuration problem

May 8, 2019, 3:53 am
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ReleaseFSP is only a vaild command if the SMU is in START or FAULT state. I expect that you are in RUN state and therefore the command failed.
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Debug Port Secured Error in Trace32 window for TC38x controller

May 8, 2019, 4:15 am
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Check ESR0, if ESR0 is always low then the device is damaged and can't be recovered. Otherwise when ESR0 is high then the device is in the Generic BSL and you should connect the device via the BSL to correct the BMHD. On the TriBoards is the ESR0 connected to the red LED which is on if ESR0 is low.
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External IRQ AUDO range

May 8, 2019, 4:25 am
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Why you don't use the receive interrupt of QSPI2? External IRQ is not necessary.
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DAVE4 XMC4500 ADC Multi-channel + DMA

May 8, 2019, 4:26 am
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Hello,

I am using XMC4500 microcontroller to develop a power electronic project.
I need to use multi-channel ADC+DMA in DAVE4 IDE.
As I search in this forum, there is no topic that exactly answering my problem.
Is there any solution for my problem?

Thank in advance,

Ade Pratama
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QSPI TxFIFO information in TC234 Controller

May 8, 2019, 4:33 am
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You can't read the TX FIFO. The DATAENTRY register is a write only register. If yiu read the RXEXIT register then you get the next available value from the receive FIFO if there is anything available.
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ASCLIN interruption inside timer interruption problem

May 8, 2019, 5:43 am
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As long as the timer interrupt has a higher priority than the spi interrupts are the spi interrupts ignored until the timer interrupt is exited. After enabling the interrupts in the timer interrupt only interrupts with higher priority than 10 can interrupt the timer interrupt.
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interruption behavior

May 8, 2019, 7:33 am
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The IOV indicate that an Interrupt Overflow is detected. This means that you lost the previous interrupt. This can be happen if you have a timer and the interrupt of this timer happens second time without the first interrupt is serviced. In any case there will be pending an interrupt.
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Contacts for MCAL improvement issues

May 9, 2019, 1:29 am
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I forwarded your hint to the responsible department for check and improvement.
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TC264 Factory Erased and FlsLoader_Write

May 9, 2019, 8:06 am
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On a new factory erased chip (TC264 BC), would it be possible to write to PFLASH through FlsLoader_Write without executing FlsLoader_Erase?
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Question for XMC4800_AUT_Base-V2.1 Board with ETHCAT_SSC_AUT_BASE_XMC48 example

May 9, 2019, 10:59 pm
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Thank you for your help Jesus.

This much better :-)

regards,
t.albert
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Emo_HandleFoc() function timing issue

May 10, 2019, 1:49 am
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Dear atozall24,

This is indeed due to MCU performance.

The interrupt trigger happens every 50us. However, when the clock is 24MHz, the time required to do the FOC calculation exceeds 50us and the interrupt trigger is missed.
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XMC 4800 Flash Prodection

May 10, 2019, 2:10 am
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Hi,
so during update application my flash is not protected against manipulation through JTAG interface ?
When i set "XMC_FLASH_PROTECTION_READ_GLOBAL" the flash is also write protected ?


Thanks,
Embedded
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Diable outputs ISO1H812G

May 10, 2019, 5:00 am
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Hello!
I'm usign ISO1H812G as output unit in SPI communication. I've implemented a function for error detection that set a variable if MISO and MOSI mismatch. I saw that ISO1H812G has the DIS pin to disable the outputs, so my question is: if i connect the DIS to a general purpose IO of my XMC4800 chip and i set it to 0 in case of errors, the outputs of the ISO1H812G will be reset to 0?

Thank you for any help
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Xc2000ed, xc2080ed, xc2090ed

May 10, 2019, 8:21 am
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Hi ..

Anyone have a datasheet for any of those special trace board chips used in Hitex emulators XC2000ED, XC2080ED, XC2090ED ?

Is it possible to run any of those chips in 128Mhz emulate a XC2788 cpu ?

Who is supplying the best R&D tools for the XC2000 controllers ?

Regards

Richard
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Can JTAG read TC277 emulation device memory?

May 12, 2019, 11:16 pm
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I find there is (JTAG *) on Tool interface of 7x ED table on https://www.infineon.com/cms/en/prod...ation-devices/ .

Is there anything special about JTAG on TC277 ED chip? Does that mean that there is no full JTAG accessing function on TC277 ED chip?

I tried to read memory space of TC277 emulation device but got timing out error through DAS miniwiggler. Except emulation device ram space, all there memory can be accessed by DAS through Miniwiggler.
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Modify SPI clk

May 13, 2019, 12:20 am
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Hi!
I'm implementing an SPI daisy chain communication and i have some problem in sending and reading the 8th and 16th bit of the sent word. i'm usign the internal clk of my XMC4800 and since the first ISO chip is an output one, i set the clk as XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_D ISABLED.
The problem is that the 8th and the 16th bit of the sent word aren't in the MISO, so i'd like to know if there's a way to forse the clk to stay high when i need it.

I put a screenshot of the signals from the output ISO chip, the read one is the SCLK. In the MISO, don't look at the bit on the left, it's from an input ISO chip in daisy chain.

Attachment 3978
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XMC4800 how to modify SPI clk

May 13, 2019, 12:56 am
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Hi!
I'm implementing an SPI daisy chain communication and i have some problem in sending and reading the 8th and 16th bit of the sent word. i'm usign the internal clk of my XMC4800 and since the first ISO chip is an output one, i set the clk as XMC_SPI_CH_BRG_SHIFT_CLOCK_PASSIVE_LEVEL_0_DELAY_D ISABLED.
The problem is that the 8th and the 16th bit of the sent word aren't in the MISO, so i'd like to know if there's a way to forse the clk to stay high when i need it.

I put a screenshot of the signals from the output ISO chip, the read one is the SCLK. In the MISO, don't look at the bit on the left, it's from an input ISO chip in daisy chain.

Attachment 3979
?????
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can Baundrate Problem

May 13, 2019, 2:14 am
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Hi,

I have can communication between Aurix TC22x and PEAKCAN dongle, the problem is with baudrate settings.
On Aurix baudrate is set as 125000kbit/s
On PEAKCAN baudrate must be set 250000kbit/s, 125000kbit/s not works

Datasheet says, that there is a baundrate prescaler in can clock module, does it change somehow baudrate i place in code ?
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