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Dave and Arduino
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Erase/Write protection of PFLASH region
Hello,
I use TC277 controller.
1. How can I enable protection of a PFLASH region against erasure / write?
2. Does infineon have an example of how this should be done?
Any other reference to topics related to this would be helpful.
Many Thanks!
Sivakumar M.
I use TC277 controller.
1. How can I enable protection of a PFLASH region against erasure / write?
2. Does infineon have an example of how this should be done?
Any other reference to topics related to this would be helpful.
Many Thanks!
Sivakumar M.
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Triggering core 1 or 2 using HighTec Compiler in TC297-B
Hi Kumaresh,
If you are using IFX MCAL, I would recommend you to refer to the startup.c file.
This has the startup code for both single and multicore configurations.
Best Regards,
Sivakumar M.
If you are using IFX MCAL, I would recommend you to refer to the startup.c file.
This has the startup code for both single and multicore configurations.
Best Regards,
Sivakumar M.
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1EBN1001AE Active Clamping Component Specification
Do you have any information regarding selection of components for the Active Clamping input on your 1EBN1001AE gate drive booster IC?
I can't find any literature on the Infineon website or the IC datasheet.
I can't find any literature on the Infineon website or the IC datasheet.
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1EDI2002AS ISO26262 / ASIL D Application Guidance
Thanks for your assistance.
I've tried contacting my local Infineon rep on 08/04/2019 and again on 30/04/2019 but haven't had a response yet.
Can you provide contact details for an application engineer?
Thanks
I've tried contacting my local Infineon rep on 08/04/2019 and again on 30/04/2019 but haven't had a response yet.
Can you provide contact details for an application engineer?
Thanks
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IGOT60R070D1 non-encrypted spice model
I think the reason for the encryption of simulation models is to protect intellectual property. Are you using full version of Simplis, whih probably can handle encrypted model?
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Read from a file
I read that fopen, fread etc.. are not working (https://www.infineonforums.com/threa...-on-non-socket) is there any other way to read a file from my PC ?
I am writing a bootloader and the client (it sends hex file to the bootloader from CAN bus). My client program shall read a hex file of the main application and send it to the bootloader.
Without standart library functions, how people send hex files from ?
Bests,
İpek.
I am writing a bootloader and the client (it sends hex file to the bootloader from CAN bus). My client program shall read a hex file of the main application and send it to the bootloader.
Without standart library functions, how people send hex files from ?
Bests,
İpek.
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DAVE TIP of the day: Semihosting in DAVEv4
Hi.
I did the steps 1 to 3 above, and the linker fails.
make: *** [EP6V43_relax.elf] Error 1
makefile:72: recipe for target 'EP6V43_relax.elf' failed
There are no other messages to help understand what is missing.
I am with an XMC4300 with Ethercat and a software a bit more complex than the example. But it runs perfectly on the Relax kit when I don't try semihosting.
Thans in advance for your help.
Olivier
I did the steps 1 to 3 above, and the linker fails.
make: *** [EP6V43_relax.elf] Error 1
makefile:72: recipe for target 'EP6V43_relax.elf' failed
There are no other messages to help understand what is missing.
I am with an XMC4300 with Ethercat and a software a bit more complex than the example. But it runs perfectly on the Relax kit when I don't try semihosting.
Thans in advance for your help.
Olivier
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QSPI code for TC399
Quote:
Hear in my code VectabNum is zero for ADC and it's working, but I do't know how it's come.
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UART Problem
Why the technical staff does not answer?
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XMC4300: General questions about flash read protection
Hello forum,
we plan to integrate the flash read protection feature into our product using a XMC4300. I'd like to make sure my plans are correct before start.
We use a bootloader (placed in first 16 kB of flash), which receives the firmware (on UART). The bootloader will install the global read protection on-demand (by a command). For application firmware update, it will use the "Disable Read Protection" (see table 8-4 in XMC4300 manual) flash command before update and the "Resume Protection" (table 8-4) command after successful update.
To be able to exchange the bootloader itself (e.g. by JTAG-interfaced J-Flash), I need to remove the read protection permanently by erasing UCB.
1) I understood that installing the read protection requires writing the User Control Block (UCB) for user 0. It is only possible to write to that UCB 4 times, even if I only access user 0? (User 0 contains the global read protect bit.)
2) Does disabling the read protection automatically erase the full chip or do I need to make that happen manually?
3) When I'd like to attach JTAG again, will a temporarily disabled read protection (by "Disable Read Protection" command) work? I assume the JTAG connect command will perform a controller reset, which will re-enable the read protection again, will it?
4) Does the enabled read protection affect the ability to read flash in my bootloader itself?
Best regards,
Ernie T.
we plan to integrate the flash read protection feature into our product using a XMC4300. I'd like to make sure my plans are correct before start.
We use a bootloader (placed in first 16 kB of flash), which receives the firmware (on UART). The bootloader will install the global read protection on-demand (by a command). For application firmware update, it will use the "Disable Read Protection" (see table 8-4 in XMC4300 manual) flash command before update and the "Resume Protection" (table 8-4) command after successful update.
To be able to exchange the bootloader itself (e.g. by JTAG-interfaced J-Flash), I need to remove the read protection permanently by erasing UCB.
1) I understood that installing the read protection requires writing the User Control Block (UCB) for user 0. It is only possible to write to that UCB 4 times, even if I only access user 0? (User 0 contains the global read protect bit.)
2) Does disabling the read protection automatically erase the full chip or do I need to make that happen manually?
3) When I'd like to attach JTAG again, will a temporarily disabled read protection (by "Disable Read Protection" command) work? I assume the JTAG connect command will perform a controller reset, which will re-enable the read protection again, will it?
4) Does the enabled read protection affect the ability to read flash in my bootloader itself?
Best regards,
Ernie T.
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Debugging ASCLoader
Yes I know, that the attached binary is not a programm and will result in a Hard fault. However flashing this binay with XMCLink to the device resulted in a bricked device!
I could not recover the device and the first 8 bytes of each sector can not be read anymore.
Further I would like to propose, that Infineon fixes the Bug in the ASCLoader project:
I could not recover the device and the first 8 bytes of each sector can not be read anymore.
Further I would like to propose, that Infineon fixes the Bug in the ASCLoader project:
- I tried to produce my own ASCLoader.bin by compiling the ASCLoader Project out of the box for XMC4800 in DAVE 4.4.2. However uploading this produced binary by the protocol described in the project pdf resulted NOT in a system answering my requests. However uploading the binary PROVIDED BY INFINEON/INCLUDED IN THE PROJECT worked!
- In the EraseSector function in main.c we use as input parameter to the function the base address of a sector to erase (attached image). This parameter is incremented if the first (few) uint32 values in a sector are zero. If there is a non zero entry in the sector detected this INCREMETED address is give as parameter to the XMC4000_PFLASH_EraseSector function. In this function this incremeted sector address is used as "SA: Absolute start address of a Flash sector. Allowed are the PFLASH sectors Sx" - which is obvious agains the spec (RefMan V1.3, p8-10/11). Therefore a sector where the first uint32 value is 0 is not erased by the official Infinenon ASCLoader! I tried to modify the Project to fix this issue and check my bug fix which failed due to issue 1.
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How to use POSIF in DAVE4.4.2?
Hi,
it this new release added to DAVE APPs, ENCODER_POSIF and HALL_POSIF?
thanks
Hakan
it this new release added to DAVE APPs, ENCODER_POSIF and HALL_POSIF?
thanks
Hakan
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can Baundrate Problem
Problem solved, it was a bug in iLLD library.
I updated it and problem i gone.
I updated it and problem i gone.
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Dave - Linked Folder
... Dave from the grave ...
It is possible, using DAVE 4.4.2:
- Select the main project which links to the external folder.
- Project
- Settings
- C/C++ General
- Paths and Symbols
- Source Location
- Link Folder
- input a name in Folder name under which the link is supposed to appear in
- open Advanced
- check Link to folder in file system
- Browse
- select folder
- edit the folder to be relative to project folder (e.g. "../common")
That's it. The .project file contain a new item when closing workspace or saving the project.
It is possible, using DAVE 4.4.2:
- Select the main project which links to the external folder.
- Project
- Settings
- C/C++ General
- Paths and Symbols
- Source Location
- Link Folder
- input a name in Folder name under which the link is supposed to appear in
- open Advanced
- check Link to folder in file system
- Browse
- select folder
- edit the folder to be relative to project folder (e.g. "../common")
That's it. The .project file contain a new item when closing workspace or saving the project.
Code:
<link>
<name>common</name>
<type>2</type>
<locationURI>$%7BPARENT-1-PROJECT_LOC%7D/common</locationURI>
</link>↧
XMC1100 Sleep mode
Hello!
I want to take periodic readings from an analogue angle sensor using the XMC1100. In order to minimize power I need to put the XMC1100 to sleep mode and then wake it up for some measurements with the angle sensor and then put it to sleep again.
I am able to bring down the power consumption by gating off the peripherals that I do no need. I then use the deep sleep function and execute the command WFI();
With this, the XMC goes to sleep, however I am unable to wake it up. What is the simplest way to wake up the XMC? A little code example would be very helpful in this regard. As far as I understand, it is not possible to wake up the XMC using some digital pin for an external interrupt (like a toggle button which can wake it up when pressed).
Any help would be appreciated :)
I want to take periodic readings from an analogue angle sensor using the XMC1100. In order to minimize power I need to put the XMC1100 to sleep mode and then wake it up for some measurements with the angle sensor and then put it to sleep again.
I am able to bring down the power consumption by gating off the peripherals that I do no need. I then use the deep sleep function and execute the command WFI();
With this, the XMC goes to sleep, however I am unable to wake it up. What is the simplest way to wake up the XMC? A little code example would be very helpful in this regard. As far as I understand, it is not possible to wake up the XMC using some digital pin for an external interrupt (like a toggle button which can wake it up when pressed).
Any help would be appreciated :)
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XMC4200 VADC Background Source blocks - intended behavior ?
Hi,
I'm currently experiencingbehavior of the VADC background source that does not fit with my expectation ;-)
I have multiple channels of both VADC Groups added to the background source and I'm using FIFOs on most of them.
During startup I have to check one of the channels multiple times before the RTOS starts up and I noticed that my code gets stuck there waiting for the VALID Flag after the first read.
Further Investigation revealed that BRSPND has one pending bit left, which seems to prevent reloading of BRSSEL into BRSPND.
The reason for this seems to be that the Result Register of this Channel has the Wait-For-Read Flag set as suggested when a FIFO is used (it is not set on the other channels). If I use the debugger to clear the Valid Flag, the BRSPND Register is reloaded and the application continues.
That raises a couple of questions:
Regards,
Lukas
I'm currently experiencingbehavior of the VADC background source that does not fit with my expectation ;-)
I have multiple channels of both VADC Groups added to the background source and I'm using FIFOs on most of them.
During startup I have to check one of the channels multiple times before the RTOS starts up and I noticed that my code gets stuck there waiting for the VALID Flag after the first read.
Further Investigation revealed that BRSPND has one pending bit left, which seems to prevent reloading of BRSSEL into BRSPND.
The reason for this seems to be that the Result Register of this Channel has the Wait-For-Read Flag set as suggested when a FIFO is used (it is not set on the other channels). If I use the debugger to clear the Valid Flag, the BRSPND Register is reloaded and the application continues.
That raises a couple of questions:
- Why does a WFR flag block the complete queue/source and not just this channel?
- Is this intentional?
- How can this be avoided?
- What exactly does WFR do with ADC FIFOs? Why does it need to be set on the Input Stage and not on the Output stage? What happens if this is reversed?
- Is there a simple way to trigger a complete BRSPND reload - Writing to BRSMR/LDEV does not do it, although the RM says it does.
Regards,
Lukas
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XMC1400 triggered multiple analog-to-digital conversion (vadc)
Will you please share the algorithm ?
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Xmc4800-f100f1024 aa
Hello,
Part#XMC4800-F100F1024 AA
we are planning to replace the microcontroller+Ethercat controller by this new controller.When we start with pin assignment document, we are not able to find the required pins for EtherCAT connection as per development board.As per the datasheet, this part also has 2XMII ports.
Do you have any reference document, which explains the pins required for Ethercat connection?
Thanks,
MPB
Part#XMC4800-F100F1024 AA
we are planning to replace the microcontroller+Ethercat controller by this new controller.When we start with pin assignment document, we are not able to find the required pins for EtherCAT connection as per development board.As per the datasheet, this part also has 2XMII ports.
Do you have any reference document, which explains the pins required for Ethercat connection?
Thanks,
MPB
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Using the TLE987x to control 6 Relays
I would like to use the TLE987x to independently manage 6 x 24V Relays.
Is it possible set setup and configure the TLE987x to independently control 6 MOSEFT using the MOSFET Driver?
Is it possible set setup and configure the TLE987x to independently control 6 MOSEFT using the MOSFET Driver?
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