Bump means I still waiting for useful comments.
For real help I would even pay.
For real help I would even pay.
↧
c167, read SPI eeprom
↧
XMC4800 Relax Kit SPI SCLK configuration
Hi all,
I'm using an XMC4800 relax kit as a "midware" which on one hand reads from a sensor via SPI, on the other hand sends out the data through EtherCAT.
Problem here is, with EtherCAT taking up a lot of pins, theoretically I can only use the following two SPI modules:
Attachment 2629
The rest are either used by EtherCAT or not populated.
While P3.7-P3.9 worked perfectly, P0.13 did not seem to produce any clock signal when probed in oscilloscope. It's worth noting that I had to probe P0.13 through Arduino pins since it's not populated in X1 and X2.
From XMC4700_XMC4800_Relax_Kit_Series_UM_v01_00_EN.pdf page 12, (shown below) I saw that P0.13 shared the same Arduino pin with P14.5, and is marked with I2C_SCL. So is it that this pin can only be used as an I2C SCL, or some other config is needed to prob P0.13 on this pin?
Attachment 2630
Any help would be appreciated!
I'm using an XMC4800 relax kit as a "midware" which on one hand reads from a sensor via SPI, on the other hand sends out the data through EtherCAT.
Problem here is, with EtherCAT taking up a lot of pins, theoretically I can only use the following two SPI modules:
Attachment 2629
The rest are either used by EtherCAT or not populated.
While P3.7-P3.9 worked perfectly, P0.13 did not seem to produce any clock signal when probed in oscilloscope. It's worth noting that I had to probe P0.13 through Arduino pins since it's not populated in X1 and X2.
From XMC4700_XMC4800_Relax_Kit_Series_UM_v01_00_EN.pdf page 12, (shown below) I saw that P0.13 shared the same Arduino pin with P14.5, and is marked with I2C_SCL. So is it that this pin can only be used as an I2C SCL, or some other config is needed to prob P0.13 on this pin?
Attachment 2630
Any help would be appreciated!
↧
↧
App for XMC4300_Relax_Kit
Hi,
1. I didnt find new App like : ETHCAT_FWUPDATE_SSC_APPLICATION_XMC48 I want to Update FW via FoE / Is this App functionally for XMC4300 too?
2. Spi-Slave ... QSpi to read Data from A/D convertor : AD7768-4 Spi_ Slave (folder Communication) has not in list of supported devices XMC4300, Dave (ver 4.3.2) has reported an error
(Dave is not able to grant your last.....)
3. Spi_Master to control A/D convertor : AD7768-4 Spi_ Master (folder Communication) has not in list of supported devices XMC4300, ....
best regards
zbyno
1. I didnt find new App like : ETHCAT_FWUPDATE_SSC_APPLICATION_XMC48 I want to Update FW via FoE / Is this App functionally for XMC4300 too?
2. Spi-Slave ... QSpi to read Data from A/D convertor : AD7768-4 Spi_ Slave (folder Communication) has not in list of supported devices XMC4300, Dave (ver 4.3.2) has reported an error
(Dave is not able to grant your last.....)
3. Spi_Master to control A/D convertor : AD7768-4 Spi_ Master (folder Communication) has not in list of supported devices XMC4300, ....
best regards
zbyno
↧
Runtime XMC4500 program code flashing
Hi to all,
i'm quite a noob in the XMC4xxx world and i'm developing an application on a previously developed hardware platform based on XMC4500F100 where, sadly, the only external access is a 2 wires RS485 port connected to P3.5(RxD) and P4.0(TxD) by mean of an RS485 half duplex transceiver with direction managed with an additional digital I/O port.
I was asked to implement a field firmware update function with above mentioned RS485 interface but being half duplex with wrong UART pin choice (NOT P1.4 and P1.5) i'm of course not able to use the "native" ASC BSL feature.
I am already submerged by many other project problems and this thing sounds to be a potential nightmare ...
So my question is :
there is a simple way to modify the ASC loader / flasher code example (XMC4000_ASCBootloader) to be embedded in my application with the purpose to load it in PSRAM segment and subsequently, when needed, use the PSRAM boot mechanism to start the firmware update process using the existing PC example program ?
I sure know it's not a solid mechanism, but i'm really in a hurry and i have no time to start a custom loader / flasher development from the scratch.
I have to say that this matter is waaay easier with STM32 MCUs, where i come from.
PS : Of course XMC4500 code should be modified to use P3.5 & P4.0 ports for UART function plus 485 buffer direction line.
i'm quite a noob in the XMC4xxx world and i'm developing an application on a previously developed hardware platform based on XMC4500F100 where, sadly, the only external access is a 2 wires RS485 port connected to P3.5(RxD) and P4.0(TxD) by mean of an RS485 half duplex transceiver with direction managed with an additional digital I/O port.
I was asked to implement a field firmware update function with above mentioned RS485 interface but being half duplex with wrong UART pin choice (NOT P1.4 and P1.5) i'm of course not able to use the "native" ASC BSL feature.
I am already submerged by many other project problems and this thing sounds to be a potential nightmare ...
So my question is :
there is a simple way to modify the ASC loader / flasher code example (XMC4000_ASCBootloader) to be embedded in my application with the purpose to load it in PSRAM segment and subsequently, when needed, use the PSRAM boot mechanism to start the firmware update process using the existing PC example program ?
I sure know it's not a solid mechanism, but i'm really in a hurry and i have no time to start a custom loader / flasher development from the scratch.
I have to say that this matter is waaay easier with STM32 MCUs, where i come from.
PS : Of course XMC4500 code should be modified to use P3.5 & P4.0 ports for UART function plus 485 buffer direction line.
↧
ETH004 example with TCP
Hi there,
In the last few weeks i`ve tried to understand the procedure of the ETH04 App and to communicate via UDP. I`m still having problems to understand the difference between UDP und TCP. It would be useful to have the same APP realized in TCP.
Perhaps someone can show me how this realisation looks like?
Best regards
J_o_e
Here`s the code from the ETH04 APP:
#include <DAVE3.h> //Declarations from DAVE3 Code Generation (includes SFR declaration)
/*Local port waiting for packets*/
#define LOCAL_PORT_RECEIVE (45555)
/*Local port used to echo back the packet*/
#define LOCAL_PORT_TRANSMIT (45174)
/*Destination port of echoed packet*/
#define TRANSMIT_PORT_DESTINATION (45175)
struct udp_pcb * udp_init_comm(unsigned int port) {
/* start the UDP server */
struct udp_pcb *pcb;
/* create new UDP PCB structure */
pcb = udp_new();
udp_bind(pcb, IP_ADDR_ANY, port);
return pcb;
}
void udp_receive_handler (void * arg, struct udp_pcb * upcb, struct pbuf * p, struct ip_addr * addr, u16_t port)
{
struct pbuf * p_out;
//As handler argument is expected the pcb that shall be used for send back the data
// Allocate a buffer to store data to be transmitted
p_out = pbuf_alloc(PBUF_TRANSPORT,p->tot_len,PBUF_RAM);
//Copy received data to transmit buffer
pbuf_copy(p_out,p);
//Send back data to same ip that sent the data but on different port
udp_sendto((struct udp_pcb *)arg,p_out,addr,TRANSMIT_PORT_DESTINATION);
//Free allocated buffer including the buffer of received data
pbuf_free(p_out);
pbuf_free(p);
}
int main(void)
{
struct udp_pcb *pcb_tr; //lwip pcb struct binded to transmit port
struct udp_pcb *pcb_rec; //lwip pcb struct binded to receive port
DAVE_Init(); // Initialization of DAVE Apps
lwIPStack_init(); //Start Lwip stack
//Create
pcb_tr=udp_init_comm(LOCAL_PORT_TRANSMIT);
pcb_rec=udp_init_comm(LOCAL_PORT_RECEIVE);
//Register an handler on receive packet event
udp_recv(pcb_rec,udp_receive_handler,pcb_tr);
while(1)
{
}
return 0;
}
In the last few weeks i`ve tried to understand the procedure of the ETH04 App and to communicate via UDP. I`m still having problems to understand the difference between UDP und TCP. It would be useful to have the same APP realized in TCP.
Perhaps someone can show me how this realisation looks like?
Best regards
J_o_e
Here`s the code from the ETH04 APP:
#include <DAVE3.h> //Declarations from DAVE3 Code Generation (includes SFR declaration)
/*Local port waiting for packets*/
#define LOCAL_PORT_RECEIVE (45555)
/*Local port used to echo back the packet*/
#define LOCAL_PORT_TRANSMIT (45174)
/*Destination port of echoed packet*/
#define TRANSMIT_PORT_DESTINATION (45175)
struct udp_pcb * udp_init_comm(unsigned int port) {
/* start the UDP server */
struct udp_pcb *pcb;
/* create new UDP PCB structure */
pcb = udp_new();
udp_bind(pcb, IP_ADDR_ANY, port);
return pcb;
}
void udp_receive_handler (void * arg, struct udp_pcb * upcb, struct pbuf * p, struct ip_addr * addr, u16_t port)
{
struct pbuf * p_out;
//As handler argument is expected the pcb that shall be used for send back the data
// Allocate a buffer to store data to be transmitted
p_out = pbuf_alloc(PBUF_TRANSPORT,p->tot_len,PBUF_RAM);
//Copy received data to transmit buffer
pbuf_copy(p_out,p);
//Send back data to same ip that sent the data but on different port
udp_sendto((struct udp_pcb *)arg,p_out,addr,TRANSMIT_PORT_DESTINATION);
//Free allocated buffer including the buffer of received data
pbuf_free(p_out);
pbuf_free(p);
}
int main(void)
{
struct udp_pcb *pcb_tr; //lwip pcb struct binded to transmit port
struct udp_pcb *pcb_rec; //lwip pcb struct binded to receive port
DAVE_Init(); // Initialization of DAVE Apps
lwIPStack_init(); //Start Lwip stack
//Create
pcb_tr=udp_init_comm(LOCAL_PORT_TRANSMIT);
pcb_rec=udp_init_comm(LOCAL_PORT_RECEIVE);
//Register an handler on receive packet event
udp_recv(pcb_rec,udp_receive_handler,pcb_tr);
while(1)
{
}
return 0;
}
↧
↧
XMC 1100 ADC how to add a second channel
Hi,
i get the result of Channel_A, my problem is that i don't know how to add a second Channel to my Code.
I use DAVE 4 and a XMC 1100 Bootkit.
/*
* main.c
*
* Created on: 2016 May 25 11:10:44
* Author: Dominik
*/
#include <DAVE.h> //Declarations from DAVE Code Generation (includes SFR declaration)
XMC_VADC_RESULT_SIZE_t result_a;
void Adc_Measurement_Handler()
{
result_a = ADC_MEASUREMENT_GetResult(&ADC_MEASUREMENT_0);
}
int main(void)
{
DAVE_STATUS_t status;
status = DAVE_Init(); /* Initialization of DAVE APPs */
if(status == DAVE_STATUS_FAILURE)
{
/* Placeholder for error handler code. The while loop below can be replaced with an user error handler. */
XMC_DEBUG("DAVE APPs initialization failed\n");
while(1U)
{
}
}
ADC_MEASUREMENT_StartConversion(&ADC_MEASUREMENT_0 );
/* Placeholder for user application code. The while loop below can be replaced with user application code. */
while(1U)
{
}
}
I hope you can help me.
Big Thank, Dominik!
i get the result of Channel_A, my problem is that i don't know how to add a second Channel to my Code.
I use DAVE 4 and a XMC 1100 Bootkit.
/*
* main.c
*
* Created on: 2016 May 25 11:10:44
* Author: Dominik
*/
#include <DAVE.h> //Declarations from DAVE Code Generation (includes SFR declaration)
XMC_VADC_RESULT_SIZE_t result_a;
void Adc_Measurement_Handler()
{
result_a = ADC_MEASUREMENT_GetResult(&ADC_MEASUREMENT_0);
}
int main(void)
{
DAVE_STATUS_t status;
status = DAVE_Init(); /* Initialization of DAVE APPs */
if(status == DAVE_STATUS_FAILURE)
{
/* Placeholder for error handler code. The while loop below can be replaced with an user error handler. */
XMC_DEBUG("DAVE APPs initialization failed\n");
while(1U)
{
}
}
ADC_MEASUREMENT_StartConversion(&ADC_MEASUREMENT_0 );
/* Placeholder for user application code. The while loop below can be replaced with user application code. */
while(1U)
{
}
}
I hope you can help me.
Big Thank, Dominik!
↧
Issues while programming intel hex file using CAN interface
Hi,
I am working on boot loader development for aurix controller(Tricore Evalution Board TC23x). I reserved flash area 0x80000020 to 0x80008000 for boot loader and
my application will suppose to reside at location 0x80008000 onwards. I programmed boot loader using tasking IDE and for application programming i am using
CAN interface(CANCaseXL by Vector) and one proprietary tool on host system to program application hex.
I am getting some issues while programming application hex(intel hex) using our proprietary tool. Interesting thing is other dummy hex files which i generated using perl script are programmed successfully through tool. I made following configuration for hex file generation
C/C++ Build -> Processor -> AURIX Family -> Check TC23x
C/C++ Build -> Settings ->
- C/C++ Compiler -> Allocation -> Threshold for putting data in __near: 0
- C/C++ Compiler -> Optimization -> Optimization level: 3 Optimize most
- C/C++ Compiler -> Optimization -> Trade-off between speed and size: Level4 Size
- C/C++ Compiler -> Code Generation -> Algorithm for switch statements: Use linear jump code
- Linker -> Output Format: Check Generate Intel Hex format
After generating application hex i tried to program it(Application will reside between 0x80008000 to 0x80008600) , but i am getting memory access error.
Can anyone please help me to resolve this issue?
Thanks,
Amir
I am working on boot loader development for aurix controller(Tricore Evalution Board TC23x). I reserved flash area 0x80000020 to 0x80008000 for boot loader and
my application will suppose to reside at location 0x80008000 onwards. I programmed boot loader using tasking IDE and for application programming i am using
CAN interface(CANCaseXL by Vector) and one proprietary tool on host system to program application hex.
I am getting some issues while programming application hex(intel hex) using our proprietary tool. Interesting thing is other dummy hex files which i generated using perl script are programmed successfully through tool. I made following configuration for hex file generation
C/C++ Build -> Processor -> AURIX Family -> Check TC23x
C/C++ Build -> Settings ->
- C/C++ Compiler -> Allocation -> Threshold for putting data in __near: 0
- C/C++ Compiler -> Optimization -> Optimization level: 3 Optimize most
- C/C++ Compiler -> Optimization -> Trade-off between speed and size: Level4 Size
- C/C++ Compiler -> Code Generation -> Algorithm for switch statements: Use linear jump code
- Linker -> Output Format: Check Generate Intel Hex format
After generating application hex i tried to program it(Application will reside between 0x80008000 to 0x80008600) , but i am getting memory access error.
Can anyone please help me to resolve this issue?
Thanks,
Amir
↧
IRMCK099 download to RAM
Hello,
the IRCable V2 is the MCEToolV2 (the debug box). The user manual is within the 99 series installer packet in the install directory under "Documentation" with the name MCETOOLV2 User Manual (attached: Attachment 2631).
The MCEToolV2 debug box is also coming with our evaluation kit EVAL-M1-099M: https://www.infineon.com/cms/en/prod...544c6f6509172c
Hope this helps.
Best regards
Luxun
the IRCable V2 is the MCEToolV2 (the debug box). The user manual is within the 99 series installer packet in the install directory under "Documentation" with the name MCETOOLV2 User Manual (attached: Attachment 2631).
The MCEToolV2 debug box is also coming with our evaluation kit EVAL-M1-099M: https://www.infineon.com/cms/en/prod...544c6f6509172c
Hope this helps.
Best regards
Luxun
↧
IRMCK099M Blank?
Hello,
The standard 099 is not programmed and has to be programmed by the customer.
Customer has to program the actual program plus the respective motor/board configuration.
This can be done to RAM for testing purposes or to OTP for the productive variant.
In to OTP the motion program can only be programmed once and for motor parameters there are 31 slots.
Please also refer to the datasheet: https://www.infineon.com/cms/en/prod...67c8f#ispnTab4
Best regards
Luxun
The standard 099 is not programmed and has to be programmed by the customer.
Customer has to program the actual program plus the respective motor/board configuration.
This can be done to RAM for testing purposes or to OTP for the productive variant.
In to OTP the motion program can only be programmed once and for motor parameters there are 31 slots.
Please also refer to the datasheet: https://www.infineon.com/cms/en/prod...67c8f#ispnTab4
Best regards
Luxun
↧
↧
Bootloader for XMC4700 Relax Kit
Today I released version 1.2.3 of the open source OpenBLT bootloader. It now features support for the Infineon XMC4000 family of microcontrollers and includes a demo for the XMC4700 Relax Kit.
The bootloader demo for the XMC4700 Relax Kit can perform firmware updates via UART and CAN. For the near future I plan to expand the XMC4700 Relax Kit bootloader demo to also support firmware
updates from SD-card, USB and TCP/IP.
Download is available from https://www.feaser.com.
Feedback and ideas are always welcome!
-Frank
The bootloader demo for the XMC4700 Relax Kit can perform firmware updates via UART and CAN. For the near future I plan to expand the XMC4700 Relax Kit bootloader demo to also support firmware
updates from SD-card, USB and TCP/IP.
Download is available from https://www.feaser.com.
Feedback and ideas are always welcome!
-Frank
↧
XMC4500 SPI communictaion (as Master)
Hi,
I started programming with the XMC4500, so my experience is limited. I want to communicate with peripheral device via SPI. I tried to do it with the Apps, but there not really clear to me. I wrote the follwing code, based on the USIC guide instructions. But it doesn't work. And I can't get even the SCLK on an osci. Do you have any sugesstions how I can make it run? Or where I can find tutorial for SPI communication with the XMC4500?
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
#include <stddef.h>
#include <stdlib.h>
#include "xmc_common.h"
#include "xmc_gpio.h"
#include "XMC4500.h"
void initSPI(void) {
/* SPI Master initialization */
uint32_t spiFdrStep = 0, spiFsclk = 500000;
uint8_t spiBrgPdiv = 0;
/* if PPPEN = 0
* fsclk = fsys x STEP/1024 x 1/2 x 1/PDIV+1
*
* if PPPEN = 1
* fsclk = fsys x 1/2 x STEP/1024 x 1/2 x 1/PDIV+1
*/
/* Calculate settings for desired fsclk, PPPEN = 1 */
while(1) {
spiFdrStep = (spiFsclk * 1024 * 2 * 2 * (spiBrgPdiv+1)) / SystemCoreClock;
if(!((0 <= spiFdrStep) && (spiFdrStep < 1024))) {
spiBrgPdiv++;
} else {
break;
}
}
SystemInit();
//Clear the reset for USIC1
SCU_RESET->PRCLR0 |= 0x80;
/* Enable the module kernel clock and the module functionality (Kernel State Configuration Register) */
/*Enabling write access*/
USIC0_CH0->KSCFG |= (1UL<< USIC_CH_KSCFG_MODEN_Pos)
| (1UL<< USIC_CH_KSCFG_BPMODEN_Pos);
// Disable SPI
USIC0_CH0->CCR &= ~( ((uint32_t)(0x01U & USIC_CH_CCR_MODE_Msk)));
// Enable SPI
USIC0_CH0->CCR |= 0x0001;
// Switch on the Baud rate generation for master mode
USIC0_CH0->FDR=(0b01 << USIC_CH_FDR_DM_Pos);
USIC0_CH0->BRG=0;
/* Configure Baud Rate Generator Register */
USIC0_CH0->BRG |= (0UL<< USIC_CH_BRG_CLKSEL_Pos)
| (0UL<< USIC_CH_BRG_PPPEN_Pos)
| (0UL<< USIC_CH_BRG_PCTQ_Pos)
| (9UL << USIC_CH_BRG_DCTQ_Pos)
| (spiBrgPdiv << USIC_CH_BRG_PDIV_Pos);
/* Configuration of Protocol Control Register */
USIC0_CH0->PCR_SSCMode |= (1ul << USIC_CH_PCR_SSCMode_MSLSEN_Pos) /* Enables/disables the generation of the master slave select signal */
| (1ul << USIC_CH_PCR_SSCMode_SELINV_Pos) /* Active low for CS */
| (1ul << USIC_CH_PCR_SSCMode_SELCTR_Pos) /* Direct select */
| (1ul << USIC_CH_PCR_SSCMode_SELO_Pos) /* Activate SELO */
| (1ul << USIC_CH_PCR_SSCMode_MCLK_Pos); /* Master Clock Enable */
/* Configure Shift Control Register */
USIC0_CH0->SCTR |= (1ul << USIC_CH_SCTR_SDIR_Pos) /* Shift out MSB first */
| (0ul << USIC_CH_SCTR_DSM_Pos) /* Data Shift Mode */
| (0ul << USIC_CH_SCTR_TRM_Pos) /* Transmission Mode */
| (15ul << USIC_CH_SCTR_FLE_Pos) /* Frame Length */
| (15ul << USIC_CH_SCTR_WLE_Pos); /* Word Length */
/* Configure Transmission Control Status */
USIC0_CH0->TCSR |= (1ul << USIC_CH_TCSR_FLEMD_Pos) /* FLE Mode */
| (1ul << USIC_CH_TCSR_WLEMD_Pos) /* WLE Mode */
| (1ul << USIC_CH_TCSR_SELMD_Pos) /* Select Mode */
| (1ul << USIC_CH_TCSR_SOF_Pos) /* Start Of Frame */
| (1ul << USIC_CH_TCSR_EOF_Pos) /* End Of Frame */
| (1ul << USIC_CH_TCSR_TDV_Pos) /* Transmit Data Valid */
| (1ul << USIC_CH_TCSR_TDSSM_Pos) /* TBUF Data Single Shot Mode */
| (1ul << USIC_CH_TCSR_TDEN_Pos); /* TBUF Data Enable */
/* Set P1.4 as Data Input, MISO => P1.4/U0C0.DX0B*/
USIC0_CH0-> DX0CR |= (1UL<< USIC_CH_DX0CR_DSEL_Pos) /* Select DX0B */
| (1UL<< USIC_CH_DX0CR_INSW_Pos);
/* Set P1.5 as Data Output, MOSI => P1.5/U0C0.DOUT0 */
PORT1->IOCR4 |=(0b10001<<11);
/* Set P1.10 as Clock Output, SCLK => P1.10/U0C0.SCLKOUT */
PORT1->IOCR8 |=(0b10001<<19);
/* Set P0.9 as Chip Select Output, CS => P1.11/U0C0.SELO0 */
PORT0->IOCR8 |=(0b10001<<11);
}
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
I started programming with the XMC4500, so my experience is limited. I want to communicate with peripheral device via SPI. I tried to do it with the Apps, but there not really clear to me. I wrote the follwing code, based on the USIC guide instructions. But it doesn't work. And I can't get even the SCLK on an osci. Do you have any sugesstions how I can make it run? Or where I can find tutorial for SPI communication with the XMC4500?
///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
#include <stddef.h>
#include <stdlib.h>
#include "xmc_common.h"
#include "xmc_gpio.h"
#include "XMC4500.h"
void initSPI(void) {
/* SPI Master initialization */
uint32_t spiFdrStep = 0, spiFsclk = 500000;
uint8_t spiBrgPdiv = 0;
/* if PPPEN = 0
* fsclk = fsys x STEP/1024 x 1/2 x 1/PDIV+1
*
* if PPPEN = 1
* fsclk = fsys x 1/2 x STEP/1024 x 1/2 x 1/PDIV+1
*/
/* Calculate settings for desired fsclk, PPPEN = 1 */
while(1) {
spiFdrStep = (spiFsclk * 1024 * 2 * 2 * (spiBrgPdiv+1)) / SystemCoreClock;
if(!((0 <= spiFdrStep) && (spiFdrStep < 1024))) {
spiBrgPdiv++;
} else {
break;
}
}
SystemInit();
//Clear the reset for USIC1
SCU_RESET->PRCLR0 |= 0x80;
/* Enable the module kernel clock and the module functionality (Kernel State Configuration Register) */
/*Enabling write access*/
USIC0_CH0->KSCFG |= (1UL<< USIC_CH_KSCFG_MODEN_Pos)
| (1UL<< USIC_CH_KSCFG_BPMODEN_Pos);
// Disable SPI
USIC0_CH0->CCR &= ~( ((uint32_t)(0x01U & USIC_CH_CCR_MODE_Msk)));
// Enable SPI
USIC0_CH0->CCR |= 0x0001;
// Switch on the Baud rate generation for master mode
USIC0_CH0->FDR=(0b01 << USIC_CH_FDR_DM_Pos);
USIC0_CH0->BRG=0;
/* Configure Baud Rate Generator Register */
USIC0_CH0->BRG |= (0UL<< USIC_CH_BRG_CLKSEL_Pos)
| (0UL<< USIC_CH_BRG_PPPEN_Pos)
| (0UL<< USIC_CH_BRG_PCTQ_Pos)
| (9UL << USIC_CH_BRG_DCTQ_Pos)
| (spiBrgPdiv << USIC_CH_BRG_PDIV_Pos);
/* Configuration of Protocol Control Register */
USIC0_CH0->PCR_SSCMode |= (1ul << USIC_CH_PCR_SSCMode_MSLSEN_Pos) /* Enables/disables the generation of the master slave select signal */
| (1ul << USIC_CH_PCR_SSCMode_SELINV_Pos) /* Active low for CS */
| (1ul << USIC_CH_PCR_SSCMode_SELCTR_Pos) /* Direct select */
| (1ul << USIC_CH_PCR_SSCMode_SELO_Pos) /* Activate SELO */
| (1ul << USIC_CH_PCR_SSCMode_MCLK_Pos); /* Master Clock Enable */
/* Configure Shift Control Register */
USIC0_CH0->SCTR |= (1ul << USIC_CH_SCTR_SDIR_Pos) /* Shift out MSB first */
| (0ul << USIC_CH_SCTR_DSM_Pos) /* Data Shift Mode */
| (0ul << USIC_CH_SCTR_TRM_Pos) /* Transmission Mode */
| (15ul << USIC_CH_SCTR_FLE_Pos) /* Frame Length */
| (15ul << USIC_CH_SCTR_WLE_Pos); /* Word Length */
/* Configure Transmission Control Status */
USIC0_CH0->TCSR |= (1ul << USIC_CH_TCSR_FLEMD_Pos) /* FLE Mode */
| (1ul << USIC_CH_TCSR_WLEMD_Pos) /* WLE Mode */
| (1ul << USIC_CH_TCSR_SELMD_Pos) /* Select Mode */
| (1ul << USIC_CH_TCSR_SOF_Pos) /* Start Of Frame */
| (1ul << USIC_CH_TCSR_EOF_Pos) /* End Of Frame */
| (1ul << USIC_CH_TCSR_TDV_Pos) /* Transmit Data Valid */
| (1ul << USIC_CH_TCSR_TDSSM_Pos) /* TBUF Data Single Shot Mode */
| (1ul << USIC_CH_TCSR_TDEN_Pos); /* TBUF Data Enable */
/* Set P1.4 as Data Input, MISO => P1.4/U0C0.DX0B*/
USIC0_CH0-> DX0CR |= (1UL<< USIC_CH_DX0CR_DSEL_Pos) /* Select DX0B */
| (1UL<< USIC_CH_DX0CR_INSW_Pos);
/* Set P1.5 as Data Output, MOSI => P1.5/U0C0.DOUT0 */
PORT1->IOCR4 |=(0b10001<<11);
/* Set P1.10 as Clock Output, SCLK => P1.10/U0C0.SCLKOUT */
PORT1->IOCR8 |=(0b10001<<19);
/* Set P0.9 as Chip Select Output, CS => P1.11/U0C0.SELO0 */
PORT0->IOCR8 |=(0b10001<<11);
}
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
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XMC4500 + Multiple Slave's, chip selects are working only on one.
Hi,
so I just notice that you´re using wrong pins :) For CS0 you can use P0.6 OR P5.9, for CS1 P0.14 OR P5.11, for CS2 P0.15, and finally for CS3 P3.14. I haven´t come up with these pins straight from my head so you can consult (as I have done) XMC Pinout tool. Of course, you can see which pins are available under datasheet or you can even use DAVE´s Pin Mapping utility. This figure comes from XMC Pinout Tool:
Attachment 2636
Try to change the pin definition and see if you´re able to use the additional slave lines.
Best regards,
Deni
so I just notice that you´re using wrong pins :) For CS0 you can use P0.6 OR P5.9, for CS1 P0.14 OR P5.11, for CS2 P0.15, and finally for CS3 P3.14. I haven´t come up with these pins straight from my head so you can consult (as I have done) XMC Pinout tool. Of course, you can see which pins are available under datasheet or you can even use DAVE´s Pin Mapping utility. This figure comes from XMC Pinout Tool:
Attachment 2636
Try to change the pin definition and see if you´re able to use the additional slave lines.
Best regards,
Deni
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XMC4500 Socket server
ok thank you. Any idea to switch eth configuration from static to dhcp?
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XMCLib CAN config
Hi,
first that caught my eye is that you don´t have "XMC_CAN_NODE_SetInitBit(CAN_NODE0)" but you have "XMC_CAN_NODE_ResetInitBit(CAN_NODE0)". They usual go in pair. Place the "XMC_CAN_NODE_SetInitBit(CAN_NODE0)" after "XMC_CAN_NODE_EnableConfigurationChange(CAN_NODE0) ".
Also try to switch the position of "XMC_CAN_MO_Config(&CAN_message_4)" and "XMC_CAN_AllocateMOtoNodeList(CAN, 0, 4)". First we want to allocate the MO to the node and then configure it. Maybe it won´t have an impact maybe it will.
Try these suggestions and let me know how it went...if necessary, I will give it second, more thorough look. But also please post next time whole code (including baudrate and MO structures).
P.S I hope you set the GPIO pins properly....above I only see the setting mode for the TX pin. What is lacking is the RX pin, but I don´t know do you have this defined somewhere else.
Best regards,
Deni
first that caught my eye is that you don´t have "XMC_CAN_NODE_SetInitBit(CAN_NODE0)" but you have "XMC_CAN_NODE_ResetInitBit(CAN_NODE0)". They usual go in pair. Place the "XMC_CAN_NODE_SetInitBit(CAN_NODE0)" after "XMC_CAN_NODE_EnableConfigurationChange(CAN_NODE0) ".
Also try to switch the position of "XMC_CAN_MO_Config(&CAN_message_4)" and "XMC_CAN_AllocateMOtoNodeList(CAN, 0, 4)". First we want to allocate the MO to the node and then configure it. Maybe it won´t have an impact maybe it will.
Try these suggestions and let me know how it went...if necessary, I will give it second, more thorough look. But also please post next time whole code (including baudrate and MO structures).
P.S I hope you set the GPIO pins properly....above I only see the setting mode for the TX pin. What is lacking is the RX pin, but I don´t know do you have this defined somewhere else.
Best regards,
Deni
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BGT24-RFB2412 Board USB Connection
Hello guys,
Has anybody got FMCW sample code? Could you share it with me?
Thank you in advance
Has anybody got FMCW sample code? Could you share it with me?
Thank you in advance
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"Error in services launch sequence"
Problem solved.
The problem is due to the fact I store my projects in an external hard disk. I've made the project on windows 8.1, where the debug tool is located in "Program Filex (x86)" folder. This folder doesn't exists in WIndows 7 32bit, so I've created a new environment variable with the correct path
The problem is due to the fact I store my projects in an external hard disk. I've made the project on windows 8.1, where the debug tool is located in "Program Filex (x86)" folder. This folder doesn't exists in WIndows 7 32bit, so I've created a new environment variable with the correct path
↧
Implementing FMCW on XMC4400 microcontroller
Hi guys,
I need it too.
Michele
I need it too.
Michele
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[XMC4500 Relax Kit] SD Card Data Write
Quote:
Originally Posted by ally
![View Post]()
where I can find sdmmc example for xmc4500? thank you.
https://www.infineonforums.com/threa...4500-Relax-kit
I've posted there how to find the example in the Help.
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types of Radar
no one knows. there are so many types.. you should go for search engine
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XMC4400 Gating ADC
Hi
I'm new to the forum and I have searched for this topic and not found the answer I am looking for.
I am using an XMC4400 and Dave version 4.
I am creating a PWM signal using 2 CCU8 slices and controlling one of the slices by using the boundary flag for an out of boundary event when sampled by the ADC.
What I want to do now is gate the ADC so it doesn't sample when the PWM switches the gate at the start of the PWM period. From reading the ADC manual I can do this by adding a CCU4 slice which I have synced to the CCU8 with an external event on the period match of the CCU8.
So far so good. What I want is to have a 1us gating period, how do I do this?
In an ideal world I would feed the CCU4 output pin to the gating input of the ADC and just have a low/high pulse of 1us to gate the ADC. But I'm not sure it works that way.
Your advice please.
I'm new to the forum and I have searched for this topic and not found the answer I am looking for.
I am using an XMC4400 and Dave version 4.
I am creating a PWM signal using 2 CCU8 slices and controlling one of the slices by using the boundary flag for an out of boundary event when sampled by the ADC.
What I want to do now is gate the ADC so it doesn't sample when the PWM switches the gate at the start of the PWM period. From reading the ADC manual I can do this by adding a CCU4 slice which I have synced to the CCU8 with an external event on the period match of the CCU8.
So far so good. What I want is to have a 1us gating period, how do I do this?
In an ideal world I would feed the CCU4 output pin to the gating input of the ADC and just have a low/high pulse of 1us to gate the ADC. But I'm not sure it works that way.
Your advice please.
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