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Can't enable LMU/SRAM read buffers in TC29x

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Hi jjorba.

For TAG IDs: the idea with Safe/Non-Safe TAG IDs is that you can use the ACCENx registers to restrict which bus masters have access to various parts of the system. No impact to LMU performance.

Just to be sure - is a a volatile variable? If not, the compiler will optimize the loop away and just do the last assignment of a=my_global_array[999].
Are you sure that DCACHE is not enabled? Verify CPU0_DCON0.DCBYP=1.
Can you share the assembly code for your example?

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