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Questions about the bandgap-reference-circuit specified in the datasheet

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Hi Rocky,

You can measure the bandgap voltage using the following function:
Code:

uint16 ADC2_VBG_Result_mV(void)
This function should return a value between 0.8 and 1.64V as specified in the TLE9867QXW datasheet (Rev 1.1) on page 109.

Best Regards

"Target Power Fail" - Message displayed on Lauterbach.

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Hi,

Currently i was working on Aurix TC399, and facing a wierd situation after startup. I have done few changes in my software and then build it, then flashed and started debug session using the lautebach. Once i launched the session, approximately in 3-4 seconds( at this point my operating system scheduler is running) i could see the message "target power failure"
and then if i again try to proceed then the message is changed to "target processor is in reset".
can anyone please let me know what could be the reason for this kind of message.

And one more thing is lauterbach throws me the warning that i don't have the license to debug multi core system and your debug session is limited to 10 minutes and then terminates. this happens few times to me. Is this can be the reason causing above problem!!
Seeking the points and inputs which could help me in solving the issue.
thanks

--Anil Kumar. B

crystal for XMC4700

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Hello,

Is there a list of recommended crystal specs/part numbers/manufacturers for use with the XMC4700 microcontrollers?

Thank you,
Florent

XMC1100 T016F0008 Flash Programming Using Serial Interface on P0.14 And P0.15 (Withou

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I’m looking for a Ram Firmware (XMC1x_ASCLoader) To transfer to the xmc1100 (Using ASC Bootstrap Loader) that speaks infineon’s Block Protocol (Like Here:

https://www.infineon.com/dgdl/Infine...3eb2429b8c1bdb (Check Page 16,Second Half))



Memtool Uses A Different Ram Firmware that speaks another [undocumented] protocol, having documentation(Or Code) for that protocol would also suit my needs.



Sample Of Other Protocol:

09:26:57.887 (UTC -05:00) [Tx]> 84 //Seems To Start The Transfer

09:26:57.892 (UTC -05:00) [Rx]< AA //Ack?

09:26:57.903 (UTC -05:00) [Tx]> 00 20 00 20 00 04 //Second and Third Byte Seem To Indicate Offset in Memory

//Firmware Transfer Seems To Start Here

09:26:57.904 (UTC -05:00) [Tx]> 00 40 00 20 09

09:26:57.919 (UTC -05:00) [Tx]> 2C 00 10 89 2C 00 10 89 2C 00 10 00 00 00 80

09:26:57.936 (UTC -05:00) [Tx]> 00 00 00 80 FE E7 FE E7 FE E7 FE E7 FE E7 FE

… Just Dumps a chunk of the Hex File Here

09:26:58.979 (UTC -05:00) [Rx]< A7 62 EA //End of Transfer, 2 bytes that Don’t Mean length or any checksum/CRC I Could Find + 0xEA

09:26:58.982 (UTC -05:00) [Tx]> 9F

09:26:58.995 (UTC -05:00) [Rx]< AA

AUIRS2181S Low Side NC(Not connection).

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Dear Gate Driver team.

We want to use only High side FET on AUIR2181.
So, We design Lin and Lo Pin to GND as a attach file.


Can we design Lin and LO pin to GND?
Because, The PULSE Generator with LV Detect interface High and Low side as Internal BlockDiagram.

Thanks
Best Regards
Gerald
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[SOLVED] SSC Communication at 10MBaud

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Hi,

Please find below an example for a 10 Mbaud connection via SSC using two TLE9879 EvalKit:
Attachment 3689

Especially at higher baud rates, it is necessary to ensure a proper initialization, otherwise wrong data can be latched and complete communication is disturbed.

Kind regards
?????

How to use tc275's DSADC for RDC?

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Who can give me a rdc demo(use dsadc) to help me use it?

XMC4200 pin select tool doesn't affect ADC values read by Radar GUI (Distance2GO)

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Attachment 3690

I've changed IFI and IFQ to high gain going into ADC. However, when I load Radar GUI go into Time Domain ADC values, I still see old, low gain values. Is it because Radar GUI is hardcoded? Is it recommended to import data into Matlab and do FFT myself?
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[SOLVED] Issue with TLE9844QX's High Side switch.

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Hi,

The High side pin for TLE984x series MCU works fine up to 5.5V. Below 5.5V, it will switch off due to undervoltage on VS pin.

In order to work in the extend range of up to 3V on VS pin, the bit HSx_CYC_ON_ACTIVE need to be set to 1. This bit is in the HS_CTRL register.
More information can be found in the User Manual (Rev 1.0) on page 925.

Kind Regards

[SPI DMA] Missing first byte

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Hi,

You will need to clear the service request in the DLR in between.
Code:

int main(void)
{
        DAVE_Init();

        SPI_Send( buffer, 3 );

        XMC_DMA_ClearRequestLine(XMC_DMA1, 3);

        SPI_MASTER_Init( &SPI_MASTER );

        SPI_Send( buffer, 3 );

        while(1U);
}

Attachment 3692

You find which request line is being used by DMA CH in the DAVE report.
Attachment 3691

Regards,
Jesus

How to realize data saving into FLASH while power supply drops?

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Hi,

Are you not missing the XMC_FLASH_lEnterPageModeCommand(); in the XMC_FLASH_Program() function?

Regards,
Jesus

How to Get the PWM output pin level status in DAVE 4 ?

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Hi,

You can look at the channel status bits, CCU8x.GCST.

Regards,
Jesus

XMC4300 Relax EtherCat Kit-V1.1 State does not change from STATE_SAFEOP to STATE_OP

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Hi,
I worked according the document "Getting Started - XMC4300_Relax_EtherCat_APP_Slave_SSC Example_V3.1.pdf".
XMC4300 Relax EtherCat Kit-V1.1 State does not change from STATE_SAFEOP to STATE_OP.
The error message is: ALSTATUSCODE_SMWATCHDOG or "Sync manager watchdog".

XMC4500 initialize problem when ETH not connect to computer by ethernet cable

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Hello to administrator of infineon:
recently,i use XMC4500 on a board designed by ourselves.
I can download my program based on your RTOS system code and it runs correctly .
however when i power up without connecting the ethernet cable ,the program seems choked in somewhere,
because the system cannot light up even a LED light on the board or cannot ping through by computer.
Well, i have been testing for a week by simple split the FTP SERVER APP into two parts FAFT_INIT & ETH_LWIP _INIT,
and it doesn't work, personally i think there should be deep problem with ETH_LWIP,
since it is the key to initialize the system configuration correctly.
Crucially, after a hardware reset signal to the MCU, everything is back to normal !!!
Frustrate by this problem, my project hit a bottleneck.
Sincerely, i hope someone could give some advice or discussion for me.
My project code partly and my DAVE configuration paste below.
Best regards,
DBking
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Getting Responce 0x01 from Iridium SLB9670 TPM 2.0 Chip with NXP5748G DEVKIT

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Hi Yogeshry,
I have the same issue as yours.
I have connected NXP LS1043ARDB with Iridium SLB9670 in ubuntu16.04
and can't get response 0x80 from TPM.
if you have any solutions for it , please let me know.
Thanks.

Tc27xx vadc

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I would say you forgot to enable the analog part of the VADC group you are using. Check bit field ANONS/ANONC of register GxARBCFG.

Aurix tc267d

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There is no information which OS you are using nor further explanation regarding your setup. In case you expect a wrong configuration or hardware fail as the root cause of your issue you should provide more information. In case you suspect a SW issue in the OS it would be good to contact the OS vendor or a support forum of the OS.

Aurix TC23x- Linker warning

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Basically this is shown when you have selected an absolute restriction on a certain function/variable then it is not selected in a generic part of the linker script.

Memtool does not connect with XE166

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Hello,

I am trying to connect Memtool 4.7 with a XE166 to program it with a new Software.
I do receive always the same error message from memtool:

"Message from component 'IMTMemtool' :
Can't connect to Target

Message from component 'MiniMonTargIntf' :
Failed to create connection failed report !

Message from component 'MiniMonTargIntf' :
Can't connect target !

Message from component 'MiniMonTargIntf' :
Bootstrap loader not responding !
Please check:
- Target power supply
- Communication cable
- Communication settings"

Targetdevice has power and the cable should not be a problem either because its used for other communications without any problem.
The Pin-settings on the board match the specification for connecting with ASC Bootstrap Loader as mentioned in Infineons manuals, the software settings of memtool should be ok, too, but i think they do not come in to play as the error happens before they are used:.

I have watched the data-transmission between PC and Device. Memtool sends a proper zero-byte with start- and ending-bit but the XE166 does not respond with the 0xD5. It´s responding with 0xC9 which might be a problem for memtool because it can´t verify it as correct code and does not have it as error-code either.
Maybe somebody can help and tell what this respond means or where I can find a list of error-respond-codes so I can look my error code up.

Oh, and of course I tried with different boards of the same kind. After the fifth board with the same beavhiour I am pretty sure it is no broken Hardware.

Thanks in Advance.

Edit:
Might be relevant: I tried new boards only

Distance2Go Doppler and FMCW mode (range and speed)

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Hey there,

I can't figure out how the Distance2Go processes I and Q data to get values for both range and speed within a single (or multiple?) measurement. What I know from theory so far is that you usually need a sequence of transmitted chirps (at least 2) to be able to resolve for both range R and speed v (or Doppler frequency fD).
Theory says this is done via a range-doppler-matrix and a two-dimensional FFT. But is that the case with the D2G board as well? I'm reading through the source code in DAVE but I did not figure that out yet. I stumbled across some 'mean' calculations, what to they do?
How can the board determine range and speed I if set the number of chirps to '1'?
In algo_api.h it is said: "Currently a single FMCW and a Doppler chirp is generated within a single frame." What does that mean?

Another question is the correlation between number of chirps, samples per chirp, data size and frame time.
As far as I understand it:
Number of chirps is the number of chirps that is generated within one frame.
Samples per chirp is equivalent to the number of samples per chirp, so if I'd have 2 chirps I need to store or evaluate 2 times the data.
Data size is the hardware buffer size (max 250)? So if I have 2 chirps and 250 samples per chirp, it evaluates the 250 samples from the first and after that the next 250 samples from the second chirp?
Frame time or minimum frame time is the time required to generate upchirp and downramp (limited by various hardware), e.g. ramp down time (PLL) and the time it takes to perform the calculations (algorithm process time etc). So I should get errors when setting the frame time lower that the minimum frame time.

I'd like to understand the system more, especially I'd like to learn about the resolution process of range and speed. Are there any sources I can get more information? I appreciate any help!
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