The high cost is mainly coming from SiC raw material is more expensive than Si. With technology improvement, we believe the price of the SiC raw material will go down, not as low as Si, but with the system performance improvement, it will fit more and more applications.
↧
High costs?
↧
TC27x VADC event / interrupt on end of conversion
Hi, I hope the following code snippet does help. It is for TC2xx devices and not necessarily tested on TC27x. so maybe you need to adapt some multiplexer settings:
//Here do not forget to enable GTM clock in GTM_CLC register.
GTM_TOM0_CH6_CN0.U = 0x0; //reset counter register
GTM_TOM0_CH6_SR0.U = 0x0200; //set period
GTM_TOM0_CH6_SR1.U = 0x0100; //set duty cycle
GTM_TOM0_CH6_CM0.U = GTM_TOM1_CH1_SR0.U;
GTM_TOM0_CH6_CM1.U = GTM_TOM1_CH1_SR1.U;
GTM_TOM0_CH6_CTRL.U = 0; //reset channel control register
GTM_TOM0_CH6_CTRL.B.CLK_SRC_SR = 0x3; //select clock source for channel
GTM_TOM0_CH6_CTRL.B.SL = 1; //signal level for duty cycle
GTM_TOM0_CH6_CTRL.B.OSM = 0; //disable one shot mode
GTM_TOM0_TGC0_GLB_CTRL.B.UPEN_CTRL6 = 0x2; //Enable CMx update
GTM_TOM0_TGC0_OUTEN_CTRL.B.OUTEN_CTRL6 = 0x2; //enable outputs on trigger
GTM_TOM0_TGC0_ENDIS_CTRL.B.ENDIS_CTRL6 = 0x2; //enable channel on trigger
GTM_TOM0_TGC0_FUPD_CTRL.B.FUPD_CTRL6 = 0x2; //enable Force Update on trigger
GTM_TOM0_TGC0_GLB_CTRL.U |= 0x1; //Host _Trig
GTM_ADCTRIG0OUT0.B.SEL0 = 0x1; //Select TOM0 Channel 6 as ADC Trigger 0
}
VADC_G0QMR0.B.ENTR = 1; //Enable External Trigger for this source
VADC_G0QCTRL0.U = (0xF << 8) | (0x1 << 13) | (0x1 << 15) | (0x1 << 16) | (0x1 << 23);
//External Trigger Input Selection
//Trigger event upon a falling edge
//Bitfields XTMODE and XTSEL can be written
//Gate Input Selection
//GTWC, Bitfield GTSEL can be written
VADC_G0QINR0.U = (0x1 << 5) /*Refill*/ | (1 << 7) | 0x1 /*External Trigger*/;
//Here do not forget to enable GTM clock in GTM_CLC register.
GTM_TOM0_CH6_CN0.U = 0x0; //reset counter register
GTM_TOM0_CH6_SR0.U = 0x0200; //set period
GTM_TOM0_CH6_SR1.U = 0x0100; //set duty cycle
GTM_TOM0_CH6_CM0.U = GTM_TOM1_CH1_SR0.U;
GTM_TOM0_CH6_CM1.U = GTM_TOM1_CH1_SR1.U;
GTM_TOM0_CH6_CTRL.U = 0; //reset channel control register
GTM_TOM0_CH6_CTRL.B.CLK_SRC_SR = 0x3; //select clock source for channel
GTM_TOM0_CH6_CTRL.B.SL = 1; //signal level for duty cycle
GTM_TOM0_CH6_CTRL.B.OSM = 0; //disable one shot mode
GTM_TOM0_TGC0_GLB_CTRL.B.UPEN_CTRL6 = 0x2; //Enable CMx update
GTM_TOM0_TGC0_OUTEN_CTRL.B.OUTEN_CTRL6 = 0x2; //enable outputs on trigger
GTM_TOM0_TGC0_ENDIS_CTRL.B.ENDIS_CTRL6 = 0x2; //enable channel on trigger
GTM_TOM0_TGC0_FUPD_CTRL.B.FUPD_CTRL6 = 0x2; //enable Force Update on trigger
GTM_TOM0_TGC0_GLB_CTRL.U |= 0x1; //Host _Trig
GTM_ADCTRIG0OUT0.B.SEL0 = 0x1; //Select TOM0 Channel 6 as ADC Trigger 0
}
VADC_G0QMR0.B.ENTR = 1; //Enable External Trigger for this source
VADC_G0QCTRL0.U = (0xF << 8) | (0x1 << 13) | (0x1 << 15) | (0x1 << 16) | (0x1 << 23);
//External Trigger Input Selection
//Trigger event upon a falling edge
//Bitfields XTMODE and XTSEL can be written
//Gate Input Selection
//GTWC, Bitfield GTSEL can be written
VADC_G0QINR0.U = (0x1 << 5) /*Refill*/ | (1 << 7) | 0x1 /*External Trigger*/;
↧
↧
no surge rating in the DS?
Why are there no surge ratings listed in the data sheet?
↧
any success stories?
IFX SiC MOS is widely used in the EV-Charging ,Servo Drive ,Energy Storage System ,Solar... , it can help customer reach a higher efficiency with much higher switching frequency .Hence , it can use smaller heat sinks or smaller magnetic component to achieve a lower cost and smaller size. Another benefit is SiC MOS is very good for Bi-directional energy conversion due to its Bi-directional conducting characteristics.
↧
Reduction of cost
SiC raw material ingots very hard to grow compared to Si. Slower and smaller , the cost is much higher compare with the Si component's. As time goes on and technology development, the price of SiC component will definitely get closer to Si component's.
↧
↧
what's the real function of DSADC's MFSC ?
hi.
Background Information:
Document: TC27x D-Step
Page: 4107 or 26-64
Delta-Sigma Analog-to-Digital Converter (DSADC)
FCFGCx (x = 0 - 5)
Filter Configuration Register x, Main CIC Filter
__________________________________________________ ________________________________________
| MFSC | [13:12] | rw | Main Filter Shift Control
| | | | Selects the displacement caused by the data shifter at the main CIC filter output.
| | | | 00B No shift, use full range
| | | | 01B Shift by 1
| | | | 10B Shift by 2
| | | | 11B Shift by 3
------------------------------------------------------------------------------------------------------------------------------------------------------
Q1: If MFSC = 11B and the main CIC filter's original output = 8,
After the displacement caused by the data shifter, the final output = (8>>3) = 1?
thx.
Background Information:
Document: TC27x D-Step
Page: 4107 or 26-64
Delta-Sigma Analog-to-Digital Converter (DSADC)
FCFGCx (x = 0 - 5)
Filter Configuration Register x, Main CIC Filter
__________________________________________________ ________________________________________
| MFSC | [13:12] | rw | Main Filter Shift Control
| | | | Selects the displacement caused by the data shifter at the main CIC filter output.
| | | | 00B No shift, use full range
| | | | 01B Shift by 1
| | | | 10B Shift by 2
| | | | 11B Shift by 3
------------------------------------------------------------------------------------------------------------------------------------------------------
Q1: If MFSC = 11B and the main CIC filter's original output = 8,
After the displacement caused by the data shifter, the final output = (8>>3) = 1?
thx.
↧
Aurix TC29xB CAN Bus
Hello,
I can't find CAN Bus example for TC29xB. Could you share it?
Thank you.
I can't find CAN Bus example for TC29xB. Could you share it?
Thank you.
↧
Trap when executing peripheral registers
Hi,
By default, the clock to all peripherals in the AURIX is disabled and so before you can access any of the registers within a peripheral, you need to enable the clock. In addition, as you have found, some of the special function registers are either ENDINIT or Safety ENDINIT protected and so you have to run through the unlock sequence. The Clock Control registers (CLC) is one of these. So, the full sequence of code to enable the clock is contained below, including a line to run T3. I have checked this on a board and the timer does seem to be running.
*
Example Code:
void InitGpt12(void)
{
*** uint16 endinitPw;
*
*** endinitPw = IfxScuWdt_getCpuWatchdogPassword ();
*** IfxScuWdt_clearCpuEndinit (endinitPw);
*
*** /* If the module is disabled then re-enable it */
*** while(GPT120_CLC.B.DISS == (boolean) 1u)
*** {
******* /* Enable GTM */
*** GPT120_CLC.B.DISR = (boolean) 0u;
*** }
*
*** IfxScuWdt_setCpuEndinit (endinitPw);
*
***** GPT120_T3CON.B.T3R = 1;
{color:#000000}}
By default, the clock to all peripherals in the AURIX is disabled and so before you can access any of the registers within a peripheral, you need to enable the clock. In addition, as you have found, some of the special function registers are either ENDINIT or Safety ENDINIT protected and so you have to run through the unlock sequence. The Clock Control registers (CLC) is one of these. So, the full sequence of code to enable the clock is contained below, including a line to run T3. I have checked this on a board and the timer does seem to be running.
*
Example Code:
void InitGpt12(void)
{
*** uint16 endinitPw;
*
*** endinitPw = IfxScuWdt_getCpuWatchdogPassword ();
*** IfxScuWdt_clearCpuEndinit (endinitPw);
*
*** /* If the module is disabled then re-enable it */
*** while(GPT120_CLC.B.DISS == (boolean) 1u)
*** {
******* /* Enable GTM */
*** GPT120_CLC.B.DISR = (boolean) 0u;
*** }
*
*** IfxScuWdt_setCpuEndinit (endinitPw);
*
***** GPT120_T3CON.B.T3R = 1;
{color:#000000}}
↧
SW/code is only executed with debugger connected?
Hi,
This could have several reasons. Please find the most common ones below
1: Installed debug protection in the UCB_DBG (256bit password)
2: Incorrect UCB handling
-->* Please check if the UCBs are written correctly,
3: Incorrect internal Watchdog service:
--> If the external watchdog is serviced correctly as well as the internal Watchdog.
* * * The debugger often do a WDT suspend to disable the internal Core watchdog.
* * * So if the * debugger is disconnected and the SW is not servicing the WDT accordingly there * will be a WDT overflow which is resulting in an reset.
4: Please check also the startup scripts of the Debugger, where maybe additional Traps and Alarms are disabled for better debugging (e.g. Flash ECC Traps)*
This could have several reasons. Please find the most common ones below
1: Installed debug protection in the UCB_DBG (256bit password)
2: Incorrect UCB handling
-->* Please check if the UCBs are written correctly,
3: Incorrect internal Watchdog service:
--> If the external watchdog is serviced correctly as well as the internal Watchdog.
* * * The debugger often do a WDT suspend to disable the internal Core watchdog.
* * * So if the * debugger is disconnected and the SW is not servicing the WDT accordingly there * will be a WDT overflow which is resulting in an reset.
4: Please check also the startup scripts of the Debugger, where maybe additional Traps and Alarms are disabled for better debugging (e.g. Flash ECC Traps)*
↧
↧
Aurix Processor Clock Speed Errors
Hello,
I ended up trying the errata from PLL_TC.005 but that did not appear to resolve the issue.
I can verify the clock speed is changing, or at least the fcpu, fcan and fbaud clocks are changing. Fcpu by outputting the signal to an LED, which changes it's period from the default to a slower rate.
It could be a supply issue, I'll have to see if I can check that with an oscilloscope as well.
What I don't get is that we're supposed to be running at 300MHz, but if we're running at 1/2 speed that would be 150MHz. However if there is a clock error it should only be able to run at 100MHz. Right now I'm trying to push out the fpll to an external pin but am having no luck.
I ended up trying the errata from PLL_TC.005 but that did not appear to resolve the issue.
I can verify the clock speed is changing, or at least the fcpu, fcan and fbaud clocks are changing. Fcpu by outputting the signal to an LED, which changes it's period from the default to a slower rate.
It could be a supply issue, I'll have to see if I can check that with an oscilloscope as well.
What I don't get is that we're supposed to be running at 300MHz, but if we're running at 1/2 speed that would be 150MHz. However if there is a clock error it should only be able to run at 100MHz. Right now I'm trying to push out the fpll to an external pin but am having no luck.
↧
signed windows driver for winusb mode
Hello,
I am using usb on xmc in winusb mode. For this, I need to install winusb driver which can be found in
DAVE-4.4.2\D_LibraryStore_4.4\resources\4.0.10\app\USBD _WINUSB\0\Templates\inf\
this driver is signed by Infineon with certificate valid from 2012 to 2015.
On Windows 10 I am unable to install this driver by bundling it with other software and using automatic install program. Can you please provide driver with updated certificate? Can you recommend a solution.
Kind regards
rum
I am using usb on xmc in winusb mode. For this, I need to install winusb driver which can be found in
DAVE-4.4.2\D_LibraryStore_4.4\resources\4.0.10\app\USBD _WINUSB\0\Templates\inf\
this driver is signed by Infineon with certificate valid from 2012 to 2015.
On Windows 10 I am unable to install this driver by bundling it with other software and using automatic install program. Can you please provide driver with updated certificate? Can you recommend a solution.
Kind regards
rum
↧
Create a TC275 project with iLLD in tasking
Hello,
'some weird error' happened. The 'weird error' I get when I include the iLLDs into a TC387 TASKING project shows itself as the compiler spitting out TONS of messages non-stop.
To fix this (as is documented in the guide how-to-build-your-illd-application-with-tasking-vx-toolset-for-tricore, is to MAKE SURE that automatic inclusion of 'sfr' files is turned OFF in the settings.
Project Properties/C-C++ Build/C-C++ Compilere/Preprocessing/ ... 'Automatic Inclusion of '.sfr' file.
I hope that helps.
Regards,
M.
'some weird error' happened. The 'weird error' I get when I include the iLLDs into a TC387 TASKING project shows itself as the compiler spitting out TONS of messages non-stop.
To fix this (as is documented in the guide how-to-build-your-illd-application-with-tasking-vx-toolset-for-tricore, is to MAKE SURE that automatic inclusion of 'sfr' files is turned OFF in the settings.
Project Properties/C-C++ Build/C-C++ Compilere/Preprocessing/ ... 'Automatic Inclusion of '.sfr' file.
I hope that helps.
Regards,
M.
↧
CAN interrupt configuration for TC397 StepB MCU
Actually there are 16 interrupt lines per module - not per node. I made the same assumption until my debugger proved otherwise. See my post from Aug 6.
-rob
-rob
↧
↧
Looking for TriCore iLLD multi-core example using TASKING (or just iLLDs)
Hi,
I'm trying to put together an example project using the TASKING VX-Toolset for Aurix/TriCore to do VERY simple multi-core processing. I'm using iLLDs.
Might there be an iLLD example of multi-core?
Thanks in advance.
M.
I'm trying to put together an example project using the TASKING VX-Toolset for Aurix/TriCore to do VERY simple multi-core processing. I'm using iLLDs.
Might there be an iLLD example of multi-core?
Thanks in advance.
M.
↧
Multi core concept
Hi,
Is it possible that I can initialisation ADC in one core and I2C in second core and both work simultaneously on power up.
Is it possible that I can initialisation ADC in one core and I2C in second core and both work simultaneously on power up.
↧
SafeLib CPU utilization
Hi All!
In my project, we are looking into to integrate Infineons SafeTLib on a TC234L, but before that we are trying to do some investigations(before we get the source code).
I wonder if someone have integrated it and could answer some questions:
How much CPU load does SafeTLib utilize?
How much RAM and FLASH is needed?
And finally, do you have any general hints that can make our integration smoother?
Regards
Mattias
In my project, we are looking into to integrate Infineons SafeTLib on a TC234L, but before that we are trying to do some investigations(before we get the source code).
I wonder if someone have integrated it and could answer some questions:
How much CPU load does SafeTLib utilize?
How much RAM and FLASH is needed?
And finally, do you have any general hints that can make our integration smoother?
Regards
Mattias
↧
trap handlers
Hi,
how can I configure Trap handlers?
So far I can see only this in debugger:
Attachment 4103
I saw that there are some functions in iLLD that handle traps, what is its's class or type:
How can I use this functions to retrieve information about trap I've enter ?
Working on Tc222L
how can I configure Trap handlers?
So far I can see only this in debugger:
Attachment 4103
I saw that there are some functions in iLLD that handle traps, what is its's class or type:
Code:
IFX_INLINE IfxCpu_Trap IfxCpu_Trap_extractTrapInfo(uint8 trapClass, uint32 tin);
void IfxCpu_Trap_memoryManagementError(uint32 tin);
void IfxCpu_Trap_internalProtectionError(uint32 tin);
void IfxCpu_Trap_contextManagementError(uint32 tin);
void IfxCpu_Trap_assertion(uint32 tin);
void IfxCpu_Trap_systemCall_Cpu0(uint32 tin);
...Working on Tc222L
↧
↧
DPS422 Pin 1 Marking Dot
Dear Sir/Madam,
It's my first time posting on the forum so I'm not really sure if my post is in the right box. Please help me moving the thread to the right place if it was in the wrong place.
My question is about the Pin 1 Marking Dot in DPS422 Pressure sensor.
Attachment 4104
Will there be any problem if my PCB is designed to have a GROUND pad right under the Pin 1 marking dot of the sensor (This dot is in the bottom side and is made from metals that is shinny like gold).
The GROUND pad is not in contacted with any other PIN. The only contacted part with the PCB's GROUND pad is the DPS422 pressure sensor's Pin 1 marking dot.
I am aware that the Pin 1 Marking Dot has a function of checking the DPS422 pressure sensors direction after placement process as mentioned at the "Recommendation" below in
part "6.2 Inspection after placement process."
(https://www.infineon.com/dgdl/Infine...5ccaf4a1fe3a32)
I only want to confirm about the possibility of keeping the ground pad in PCB in contact with the Pin 1 Marking dot.
Can anybody tells me If there are any documents mentioned about this. I have tried looking for all DPS422 Datasheet on the Infineon HP with no luck.
Thank you in advance.
With all the best,
Tran Dinh Hai Dang
It's my first time posting on the forum so I'm not really sure if my post is in the right box. Please help me moving the thread to the right place if it was in the wrong place.
My question is about the Pin 1 Marking Dot in DPS422 Pressure sensor.
Attachment 4104
Will there be any problem if my PCB is designed to have a GROUND pad right under the Pin 1 marking dot of the sensor (This dot is in the bottom side and is made from metals that is shinny like gold).
The GROUND pad is not in contacted with any other PIN. The only contacted part with the PCB's GROUND pad is the DPS422 pressure sensor's Pin 1 marking dot.
I am aware that the Pin 1 Marking Dot has a function of checking the DPS422 pressure sensors direction after placement process as mentioned at the "Recommendation" below in
part "6.2 Inspection after placement process."
(https://www.infineon.com/dgdl/Infine...5ccaf4a1fe3a32)
I only want to confirm about the possibility of keeping the ground pad in PCB in contact with the Pin 1 Marking dot.
Can anybody tells me If there are any documents mentioned about this. I have tried looking for all DPS422 Datasheet on the Infineon HP with no luck.
Thank you in advance.
With all the best,
Tran Dinh Hai Dang
↧
Eliminate oscillation
Guys, anyone knows how to eliminate oscillation and what causes oscillation during SiC switching?
↧
Information on measurement techniques of high-speed voltage and current waveforms
Hi, I have a question, is there any information on measurement techniques of high-speed voltage and current waveforms?
↧