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Econo modules with internal shunts

March 9, 2020, 8:39 am
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Hi SiCguru,

Modules with integrated shunts offer a space saving alternative of high accurate current measurement with good heat dissipation.
You don't need to think about the heating of the PCB by the shunt.
It is directly connected to the heatsink via the module.
Shunt modules are named with an ""I"" as a first letter.
You can for example search for an IFF... or IFS module.
Alternatively you can use the filter and choose the option "Current sense shunts" in the section "Features" like shown on the picture below:
Attachment 4531
More information can be found on www.infineon.com/econo.


BR
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utilization of IGBT7 in Econo?

March 9, 2020, 8:45 am
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Hi Wen,

Yes. Due to increased gate charge the possibility of parasitic turn on is lower than for IGBT4.
This makes it suitable for unipolar gate supplies.
The other benefit of higher Qg is better controllability of du/dt.

BR
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LBIST Run Completion Reset and RAMIN field of HF_PROCONRAM for Aurix 2G

March 9, 2020, 9:10 am
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Hello Support,

At the end of successful run of LBIST, there is a reset automatically triggered by the TC3xx parts [Aurix 2G].
Under that Reset due to LBIST, if the contents of
HF_PROCONRAM.RAMIN=2'b10
HF_PROCONRAM.RAMINSEL=6'b0000_00
HF_PROCONRAM.LMUINSEL=7'b0000_000
were set via UCB_DFLASH_ORIG settings,

then will all the RAM be initialized as selected by LMUINSEL and RAMINSEL fields?

I am assuming it is not, because it is not a Cold Reset condition.
Please confirm.

Best Regards
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PressFIT compared to solder Pins?

March 9, 2020, 9:19 am
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Hi TondGy,

PressFIT pins use the cold welding contact principle.
They are robust against vibration, have a good electrical conductivity and are thermally robust.
For the module they offer a failure rate reduction of the terminal connection compared to soldering.
More information you can find here.

BR
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Aurix 2G LBIST Warm Reset and RSTCON2 USRINFO Reset

March 9, 2020, 10:57 am
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Hello Support,

Is there any register within Aurix 2G whose values are maintained same across LBIST Reset occurrence?

Best Regards
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can't download aurix-studio

March 9, 2020, 5:27 pm
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ive tried to download AURIX™ Development Studio software via the link given from aurix official website.
but it kept to stop downloading from 75mb(total362mb)
i can not link the download links here,, but it definately doesn't work so..

is there any other link so that i could get a aurix-studio setup program ??
thanks.
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SPI APP bug on XMC4800

March 9, 2020, 8:55 pm
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Hi,saili_desai;
Do you called the SPI_MASTER_Receive() in your interrupt routine? Thanks & regards.
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Emulator Debug Port Secure error on Trace

March 10, 2020, 12:42 am
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Hi

there are total 4 sets of BMHDx_ORIG & BMHDx_COPY, if BMHD0_ORIG is wrong, it will look at BMHD0_COPY, and the sequence follows to BMHD1/2/3.
you mentioned u erased BMHD1/2/3, this will prevent the TC29x from booting because of ERRORED condition in UCB for confirmation code (ie, 0x43211234 = unlocked), normally the debugger advises u from erasing them.

in an UCB errored state, the SSW recognizes this as failed Flash startup and consequently doesn’t boot the device as indicated by ESR0 LOW.
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IRMCF171 I can not start

March 10, 2020, 12:56 am
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IR2136 application circuit

March 10, 2020, 1:00 am
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Quote:
Originally Posted by Srivatsa View Post
Pls check if the MOSFET Q8 is turning ON. Also, check the status of Fault pin. You can write to me at srivatsa.raghunath@infineon.com and I will see if I can get a field applications engineer to support you onsite.
Hello, I determined the value of the capacitor, it is 33nF, I am doing tests and I now have a PWM from 0 to 20V in VS1, VS2 and VS3.

the problem now is that I have current spikes at each switching, I tried to put a big filtering condo on the 20V power supply and this has reduced the spikes but there are still some left.
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XMC4200 : bit frame generation

March 10, 2020, 1:12 am
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Hello!!!

I'm using Infineon XMC4200 to generate in a certain output port , for example Port2 , 8 contemporary bit frames that have to be repeated cyclically for example every 1 sec.
Every bit frame is composed by 8 bits and the bit timing has to be 20usec; therefore the transmission of the frame lasts 20usec x 8 =160 usec
Considering that :
Frame0 is the frame in the output P2.0 and its value is 0x00,
Frame1 is the frame in the output P2.1 and its value is 0x01,
and so on until Frame7 for output P2.7 value 0x07,
we would obtain in the port2 the following signals that have to be repeated cyclically every 1 sec:

Attachment 4534

How this can be achieved using an HW peripheral of the XMC4200 ?

(Value reported for the bit frames are just an example).
Thank you in advance for the help
Enzo
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XMC4500. USB-device. Zero-length packets in isochronous IN-endpoint - how to prevent?

March 10, 2020, 2:00 am
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I need a fast real-time data stream from device (USB-device) to PC (USB-host). I use a large isochronous endpoint (packet length <= 1023 bytes).
The data is transmitted, but very often in frame stream on the host side I get of zero-length packets (ZLP). Although I do not send ZLP from my device (I send all packets of a fixed length).
Because of this, the flow rate decreases.
How to transfer data into USB-core so that ZLP-s are absent?

I write the data for transfer like this:
Code:
#define USBCFG_DMA 0

#define B0 (1u << 0)
#define B1 (1u << 1)
#define B2 (1u << 2)
...
#define B31 (1u << 31)

//Writes number of bytes in to the USB IN endpoint.
u32 UsbHwEpWrite(uint epa, void const *buf, u32 len)
{
  UsbEp *ep = &udev.ep[epa & USB_EP_NUM_MSK];
  if (ep->state != ep->S_CFG) return 0;
  ep->xferBuf = (u8 *)buf;
  ep->xferTotal = len;
  ep->xferLen = ep->xferCnt = 0;
  ep->state = ep->S_IN;
  StartWriteXfer(ep);
  return ep->xferTotal;
}

//Start a new in transfer.
//Based on the transfer values of the endpoint the in endpoint registers will be programmed to start a new in transfer
//ep - Endpoint to start the transfer
static void StartWriteXfer(UsbEp *ep)
{
  uint i, n, e = ep->address & USB_EP_NUM_MSK;        //for isoc.ep ep->address == 0x81
  HwRegsUSB::T_DEP volatile *pdep = &USB.DIEP[e];
  n = maxTransferSize[__USAT(e, 1)];                  //for isoc.ep n == 65472
  if (ep->xferTotal - (i = ep->xferLen) < n) ep->xferLen = i = ep->xferTotal;
  else ep->xferLen = i += n;
  u32 j = 1 << 19; //number of packets. do not used, since i != 0 for isoc.ep
  if (i) {
    i -= ep->xferCnt;
    if (e) j = divCeil(i, ep->maxPacketSize) << 19;  //#define divCeil(a, b) (((a) + (b) - 1) / (b))
    j |= i;        //for isoc.ep for example: j == 0x803FF
    if (USBCFG_DMA) { //USBCFG_DMA==0
      u8 *s = ep->xferBuf + ep->xferCnt; //source address
      if (((u32)s & 3) || !IN_RANGE((u32)s, RAM_regionB_start, RAM_regionC_start + RAM_regionC_size - 1)) { //do not used, since the isochronous point data placed is in RAM
        memcpy(ep0buf.data, s, i);
        s = ep0buf.data;
      }
      pdep->DMA = (u32)s;  //USB.DIEPDMAx
    } else USB.DIEPEMPMSK |= 1 << e; //enable fifo empty interrupt
  }
  //Program size of transfer and enable endpoint
  pdep->TSIZ = j;          //USB.DIEPTSIZx
  pdep->CTL |= B26 | B31;  //USB.DIEPCTLx. set bits CNAK and EPEna
}
When data transfer to USB-host is completed, an interrupt occurs, which is processed by this code:

Code:
//Handles all interrupts for all in endpoints
//The interrupt handler first checks, which endpoint has caused the interrupt and then
//determines, which interrupt should be handled.
static void HndIEPInt()
{
  int i, e;
  u32 c, ie, ia = USB.DAINT & B16 - 1;
  while ((e = 31 - __CLZ(ia)) >= 0) {
    ia -= 1 << e;
    UsbEp *ep = &udev.ep[e];
    HwRegsUSB::T_DEP volatile *pdep = &USB.DIEP[e];
    ie = pdep->INT;    //USB.DIEPINTx
    ie &= (USB.DIEPEMPMSK >> e & 1) << 7 | DIEPMSK;  //enum {DIEPMSK = B0 | B1 | B2 | B3};
    if (!USBCFG_DMA) if (ie & B7) {
      //Write data to an endpoint fifo
      //The data from the ep->xferBuf gets copied in to the tx fifo of the endpoint until the buffer has been read
      //completely or the tx fifo is full. The transfer values are not updated.
      if (c = ep->xferLen - ep->xferCnt) { //calculate the length and the amount of dwords to copy based on the fifo status
        //add the unaligned bytes to the word count to compare with the fifo space
        if (c < (i = (pdep->TXFSTS & B16 - 1) << 2)) i = c;  //pdep->TXFSTS == USB.DTXFSTSx
        u32 volatile *fifo = FIFO_PTR(ep->txFifoNum);        //#define FIFO_PTR(epn) (u32 *)((u8 *)&USB + 0x1000 + (uint)(epn) * 0x1000)
        u8 *s = ep->xferBuf + (c = ep->xferCnt);
        for (ep->xferCnt = c + i; (i -= 4) >= 0; s += 4) *fifo = *(u32p8 *)s; //copy data dword wise
        if (i & 3) {
          c = 0;
          if ((i += 2) >= 0) {
            c = *(u16p8 *)s;
            s += 2;
          }
          if (i) c |= *s++ << __USAT(i << 4, 5);
          *fifo = c;
        }
      }
    }
    if (ie & B0) {
      if (USBCFG_DMA) if (!(pdep->TSIZ & B29 - 1)) ep->xferCnt = ep->xferLen;    //pdep->TSIZ == USB.DIEPTSIZx
      if (ep->xferTotal == ep->xferLen) {  //always true
        pdep->CTL = pdep->CTL & (B11 - 1 | B15 | 3 << 18 | B20 | 15 << 22) | B27; //USB.DIEPCTLx. set bit SNAK. I also tried not to set this bit after transfer was completed - but nothing changes
        ep->state = ep->S_CFG;
        if (!USBCFG_DMA) USB.DIEPEMPMSK &= ~(1 << e);  //Mask fifo empty interrupt
        UsbEventEndpoint(USB_EP_IN(e), USB_EVT_IN);    //Inside this function, a call of UsbHwEpWrite() is made to write the next data frame
      } else StartWriteXfer(ep); //start next step of transfer - never called for isoc.ep
    }
    if (USBCFG_DMA) if (ie & B2) trap(TRAP_USB | USB_ERR_AHB << 16, pdep->DMA);
    pdep->INT = ie; //USB.DIEPINTx
  }
}
remark:

Code:
struct UsbEp {
  enum { //endpoint's states
    S_VOID, //do not configured
    S_CFG,  //is configured
    S_IN,  //IN-transaction in progress
    S_OUT  //OUT-transaction in progress
  };
  union {
    struct {
      u8 type:2;            //The endpoint type
      u8 isStalled:1;      //Sets if the selected USB endpoint is stalled.
      u8 sendZLP:1;        //If set, a zero length packet will be send at the end of the transfer
    };
    u8 attr;
  };
  u8 volatile state;    //one from S_...
  u8 address;          //The endpoint address including: bits0...3 - endpoint number; bit7 - direction
  u8 txFifoNum;        //Endpoint transmit Fifo Number
  u16 maxPacketSize;    //The maximum size of packet for USB endpoint (due to FS Speed device only 64 Byte)
  u16 xferLen;          //The length of the current transfer
  u16 xferCnt;          //Bytes transfered of the current USB data transfer
  u16 xferTotal;        //The length of total data in buffer
  u8 *xferBuf;          //The buffer of the current transfer
};

typedef __packed u16 u16p8;
typedef __packed s16 s16p8;
typedef __packed u32 u32p8;
typedef __packed s32 s32p8;
typedef __packed u64 u64p8;
typedef __packed s64 s64p8;
typedef __packed u32 u32p16;
typedef __packed s32 s32p16;
typedef __packed u64 u64p16;
typedef __packed s64 s64p16;
typedef __packed u64 u64p32;
typedef __packed s64 s64p32;
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EtherCat XMC4300 - pin allocator is not working

March 10, 2020, 2:16 am
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Hello,

I´m not able to select Pins in the XMC 4300 EtherCat example:
If i try to select Pin Number (Port) it ends in - Solver time out hast occured.....

I can generate ,compile and also run the example but I can´t change the pins wit the manual pin allocator. Why?
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ADC_MEASUREMENT_ADV 4.0.14 with SCAN_APP creates wrong config

March 10, 2020, 3:28 am
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When using ADC_MEASUREMENT_ADV with ADC_SCAN_APP setting, the created mask for loading GxASSEL is wrong

e.g.
new project for XMC4400x64
add ADC_MEASUREMENT_ADV: Number of Channels 3
config Pin Allocator: Channel_A P14.1, Channel_B P14.3, Channel_C P14.5

Results in (adc_measurement_adc_conf.c):
Code:
.insert_mask  = 41 //0b00101001
what will be loaded in G0ASSEL register. But it should be 0b00101010 in this case.
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FF1800R17IP5 with Uge=0V/+15V

March 10, 2020, 4:25 am
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Hi,
Is, possible to use the FF1800R17IP5 power module with unipolar gate voltage (Uge=0V/+15V)?
Ty
Max
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BLDC_SHIELD_TLE9879 questions.

March 10, 2020, 4:58 am
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As I understand the board has a firmware ready to operate from SPI master (the board serves as SPI slave).
But I haven't found any documentation regarding the communication protocol and commands.
I also haven't found how do I set a chip select pin for the board (it has 4 on board so 4 boards can be operated from one axis manager).
May be I could be satisfied by high level API like
Code:
shields->setMode(HALL, BOARD1);
shields->setMode(FOC, BOARD1);
       
shields->setMotorSpeed(500, BOARD1);
shields->setMotorSpeed(2000, BOARD2);

shields->setMotorMode(START_MOTOR, BOARD1);
delay(5000);
shields->setMotorMode(START_MOTOR, BOARD2);
delay(5000);
shields->setMotorMode(STOP_MOTOR, BOARD1);
delay(5000);
shields->setMotorMode(STOP_MOTOR, BOARD2);
delay(5000);
But I need more control on the boards.
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BLDC_SHIELD_TLE9879 driving DC motor.

March 10, 2020, 5:01 am
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The question is - how can I drive a DC motor with the board in H-Bridge topology?
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Junction temperature measurement

March 10, 2020, 6:21 am
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Hi guys,

I’m using an IKW40N120H3 in a boost converter.
What is the best way to measure the junction temperature of a device?

Thanks!
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How to press in the EconoPACK 4 in the PCB?

March 10, 2020, 6:46 am
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Could someone here explain, how to press in the EconoPACK 4 in the PCB?
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Aurix 2G LBIST Warm Reset and RSTCON2 USRINFO Reset

March 10, 2020, 7:48 am
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The Standby Controller XRAM (0xF0240000-0xF0241FFF) is not affected by LBIST.
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