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SPI Master App: Wrong clock polarity

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Hi,

I'm using the SPI_Master app in Dave 4.42 with a XMC2Go board.

The App-configuration is seen in the attached picture SPI_Master_App_Setup.PNG.
You see that the SPI-Clock is set to High if active, transmit on rising edge.

Looking at the clock and data output pins signals (see attached word document)
it is clear that the data is taken not at the rising but at the falling edge, opposite to what is expected from
the App configuration.
If the App is configured to data at falling edge the data is in reality sampled at rising edge instead.

So it appears thate the clock edge is set opposite to what I choose in the App setup.

Is this an error in the App or are there any other hidden settings that I'm not aware off?
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EconoPack+ B and D

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Hi JoFoe,

First of all pin and power terminal positions of EconoPACK™+ D-series as well as module dimensions are identical to EconoPACK™+ B-series.
D-series modules has following improvements:
- lower internal inductivity;
- ultrasonic welded power terminals;
- pressFIT control terminals;
- injection molded power and control terminals;
- improved TC curve.

Infineon recommends to use EconoPACK™+ D-series for the new designs.
You can find more information here.

BR

Paralleling

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Hi nick,

These recommendations you can find here.
In general you should consider following: dynamic and static current sharing, gate drive design and bus bar symmetry.

BR

Why many Pflash ECC errors are reported on HT test while RT/LT tests are ok?

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For TC3xx, check DMU_HF_PWAIT and DMU_HF_DWAIT.

Reading Data from PLC Over Ethernet MAC

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Hi,


We are using XMC4800_relax_kit to read the data from Allen Bradley Micro820 PLC which collects the data from sensors and stores in to holding registers and coils, we are able to read the data from PLC over Modbus, But if i want to read the data from PLC over Ethernet MAC how to read.

Allen Bradley Micro820 PLC supports Modbus and Ethernet IP.

Is there any example? if it is there please let me know.



Thanks & Regards,
Swamy.

Emulator Debug Port Secure error on Trace

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Hello,

Is it possible to come out of this issue?
Do you have any solution for this?

IGBT in general

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@ Nick,
here you find an interesting application note explaining the structure of an IGBT: https://www.infineon.com/dgdl/Infine...53559f8d921224.
It is quite old (2012) but most of the concepts are still valid for nowadays IGBTs.

Also, you can have a look at this presentation that also explains the area of application of IGBTs: http://publish.illinois.edu/grainger...en_Slides1.pdf.

@JoFoe,
in many applications there is the need to let the current flow bidirectionally. A 'standard' IGBT only allows current to flow in one direction. For this reason, practically an IGBT comes almost always Co-Packed with a diode that allows the current to flow in the opposite direction of the IGBT current. An Reverse Conducting IGBT (RC-IGBT) has a diode integrated in the same structure of the IGBT, that means that if you opened a packed of an RC-IGBT device you would only find one chip.

@AnniLe,
the main trend of the IGBT technology has always been to reduce the conduction losses (by allowing a always lower VCEsat) and at the same time minimizing more and more the switching losses by means of an accurate engineering of the tail current. In terms of device structure, this is generally translated in having thinner devices. Also, as the cost of the devices are continuously decreasing, newer technologies have generally allowed for higher current denisities.

Regards,
Giuseppe

hard/soft switching


Why is the tail current inevitable for IGBTs?

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Hi Wen,
the IGBT is a bipolar device and, due to this bipolar nature, it stores an excess of charges during the conduction phase. This allows the IGBT to show very low resistivity during the on phase.
However, on the other hand, this excess of charge, that must be depleted in the turn-off phase, is responsible of the tail current.

Regards,
Giuseppe

Burning FETs on new layout with 6EDL04I06PT

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Hi,

I made a motor drive using 6EDL04I06PT, STD16NF06T4 FETs (16A TO252), 0.033ohm triple shunt, 2.2uF bootstrap caps and 24ohm gate drives on all gates.

I laid out one PCB with this, and it works pretty near perfectly... but there was some switch ringing, and ringing on the shunt resistors which was causing occasional current trips, so when I respan the board (needed to change a few unrelated things) I moved the shunts around to reduce the loop areas and minimise the inductance.

The other change I made, was to use the NC pins to feed through the LO1,2,3 signals, which made for a much tidier routing with fewer ground plane breaks. Since the board is being used for low voltage (up to 48V) no concern about creepage distance.
Is this OK to do? The datasheet says n/c - not connected, which in my mind meant they were probably intended for this purpose, but now I'm less sure.
Despite being as close to identical schematically as conceivable apart from those layout changes, the board has destroyed two sets of FETs after only a few seconds of operation. Symptom has been that the low side FETs have had their gates burnt through - only tens of ohms between gate and source. High side FETs have possibly also died, but it's less clear cut; the gates still have high impedance and ~3Mohm drain source resistance.

Board has been run with 15V gate drive voltage, 24V supply.

Firmware being run on it is identical. I can still upload the firmware to the old version and have it spinning away happily.

Any advice? I have tried prising up the N/C legs on the gate drive, and it ran again, but breifly... I only changed the FETs that seemed to have died, perhaps they were all partially knackered.

Attachment 4537

Attachment 4538

IR2136 application circuit

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For reducing the current spikes, you can check your layout. See an optimal layout example as attached. Use dedicated traces right from the shunt resistor to the resistors of
amplifier. Traces must not be shared with ground planes. Keep traces among MOSFETs and DC bus capacitors as short as possible.

You can also try with a bigger Vcc capacitor.

Attachment 4540
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Aurix 2G Safety Manual Appendix about LBIST Execution

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Hello Support,

In the Aurix 2G Safety Manual, in the appendix, following section/table
"TC39B - COLD POWER-ON RESET AFTER LBIST EXECUTION"

There I see ECCD and FAULLSTS MTU Register contents for initialized RAM.
By default, those registers are not accessible after LBIST Execution because of MTU is not enabled.
So, how do I verify those MTU register contents?
I am assuming when I enable the MTU in the code, it will clear all those registers.
Hence this question.
Best Regards

IRMCF171 I can not start

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Quote:

Originally Posted by dronnet View Post
Technical support answered me and sent a link http://www.mips.com/products/softwaretools/legacy/8051/. Such a link does not exist, the site redirects to the main page https://www.mips.com/


Maybe another programmer is suitable for working in Keil uvision?

Sorry for the delay. You are trying to program the 8051 microcontroller correct? Not the Motion Control Engine (MCE)? Since this is an older part, I believe Keil has renamed their products and it might be a good idea to reach out to them just to confirm. I have included an image of a product list that we have purchased from Keil in the past for reference. You might be able to ask for these specific part numbers.

In our documentation we specify that you will need this from Keil:
1. MIPS SNAV-M8051EW Debugger with Keil uVision driver (cannot find on website).
2. Keil PK51 Professional Developers Kit (http://www.keil.com/c51/pk51kit.asp)
It looks like a debugger is included in the developers Kit. Maybe they have now combined the M8051EW debugger in the Kit?

BTW, you will also need the IRMC-ISO isolation board. This has been renamed to MCETOOLV2 (https://www.infineon.com/cms/en/prod...rds/mcetoolv2/)

Attachment 4541
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ADC_MEASUREMENT_ADV 4.0.14 with SCAN_APP creates wrong config

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hmm, ok, didn't know that feature ... the problem in my case was the following:

I had configured two apps:
ADC_MEASUREMENT_ADV_0 on P14.3 and P14.4
ADC_MEASUREMENT_ADV_1 on P14.8, P14.9 and P14.14

so my expectation was:
adc0 scans its channels 3 and 4 (G0ASSEL=0b00011000)
adc1 scans its channels 0,1 and 6 (G1ASSEL=0b01000011)
but G1ASSEL in my case was 0b01011011, so for me it looked like channel 3 und 4 of adc1 get converted during the scan. I noticed this because I was getting wrong results for adc1_ch0. Looking at the result register I saw that RESD[0].CHNR also jumped between 0, 3 and 4.
So I thougth the scan settings are wrong and the otherwise unconfigured channels 3 and 4 of adc1 just get written into result0 by default. Unfortunately I'm not able to reproduce this in an empty project, so maybe something else was going on. I need to check that again.

Can a built-in NTC be used for Tj read out during operation?

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Dear all,

Can a built-in NTC be used for Tj read out during operation?

Thanks in advance.

Declaration hazardous substances

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Dear all,

another question: I need to know if a module contains hazardous substances. How can I get such a declaration?

Many thanks in advance.

Regards

Does the diode also influence the Eoff of an IGBT?

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Dear all,

Does the diode also influence the Eoff of an IGBT?

XMC4500: Usage of the core coupled memory (CCM)

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Hello,

to improve the performance of my application on a
XMC4500F100K1024AC, I tried to use the CCM but I
did't find any hints in the web.

In the STM32F4xx-world they use a special variable
declaration to place them into the CCM.

So I started to declare my variables step by step
in this way, e. g.:

static float xyz __attribute__((section(".ccmram")));

DAVE's compiler/linker passed without trouble
and there was an ascertainable gain of performance.

But if I exceed a certain number of variables declared
in this way, the application suddenly crashes.

Does the CCM have to be specially initialized or
are other preparations required?

Best regards

Dave 4.4.2 Memory Settings Page missing

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Hallo Armatron
hallo All,
I am falling into the same problem: there is no "Memory Settings" option in DAVE 4.4.2, so I do not know how to configure the starting address for the EEPROM EMULATION.
Furthermore, do you have any working example to share with me?
Thank you very much for your kind reply.
Ciao
Fabio

XMC4500. USB-device. Zero-length packets in isochronous IN-endpoint - how to prevent?

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Question canceled. I studied the manual more thoroughly and independently solved this problem.
For those members, who will be interested, I give a solution:
In function StartWriteXfer() needs modify these lines:
Quote:

pdep->TSIZ = j;
pdep->CTL |= B26 | B31;
to:
Quote:

j = pdep->CTL;
pdep->CTL = j | B26 | B31 | B29 >> (j >> 16 & 1);
and after this action the extra ZLP no longer appear.
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