Is there a way to specify where functions from libgcc will go? I am working on an XMC1300 project. I see that helper functions are being linked in from libgcc.a, and I would like them to be executed from SRAM instead of FLASH.
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Specify location of functions from libgcc
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Problem while debugging
After building my code, when i click on debug option , it is directly terminating without allowing me to click resume option. It is directly getting terminated. I am using DAVE version 4.3.2.
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XMC4800 EtherCAT frame processing
Hello,
I am trying to figure out the frame processing principle of ESC in XMC4800 MCU. However, the 'Reference Manual' does not explain about it instead it point to datasheet of ET1100. So I guess they have same ESC core. In the datasheet of ET1100, Fig. 5, page I-14 I it is explained that
- Processing direction: frame will get in port#0, passes the EtherCAT processing uint (EPU) and gets out at port#1
- Forwarding direction: when the frame get back port#1 (after passing all slaves), it will directly forwarded to port#0 to return master
As my understanding, all ouput/input data processing for one slave will done once by EPU in the processing direction frame.
Attachment 2674
I have done a simple test with 2 XMC4800 Relax kits. I put a pin toggle at each APPL_OutputMapping() and APPL_InputMapping() event. And this is my result (two upper signals come from Slave#1 and two lower ones from Slave#2)
Attachment 2675
As you can see, for each slave there is a delay between output and input events, it can be understood. But why APPL_InputMapping() event of slave#1 happens later than APPL_OutputMapping() event of slave#2. It seems that the APPL_InputMapping() event is processed on the returned frame, not in processing direction frame, can you explain this?
Thank you!
I am trying to figure out the frame processing principle of ESC in XMC4800 MCU. However, the 'Reference Manual' does not explain about it instead it point to datasheet of ET1100. So I guess they have same ESC core. In the datasheet of ET1100, Fig. 5, page I-14 I it is explained that
- Processing direction: frame will get in port#0, passes the EtherCAT processing uint (EPU) and gets out at port#1
- Forwarding direction: when the frame get back port#1 (after passing all slaves), it will directly forwarded to port#0 to return master
As my understanding, all ouput/input data processing for one slave will done once by EPU in the processing direction frame.
Attachment 2674
I have done a simple test with 2 XMC4800 Relax kits. I put a pin toggle at each APPL_OutputMapping() and APPL_InputMapping() event. And this is my result (two upper signals come from Slave#1 and two lower ones from Slave#2)
Attachment 2675
As you can see, for each slave there is a delay between output and input events, it can be understood. But why APPL_InputMapping() event of slave#1 happens later than APPL_OutputMapping() event of slave#2. It seems that the APPL_InputMapping() event is processed on the returned frame, not in processing direction frame, can you explain this?
Thank you!
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DAVE with XMC creating a library project
Hello,
Very new to infineon microcontrollers and DAVE. Please be patient.
I have run through a couple examples and I think I understand enough of the XMC library. I decided to start writing my own library for multiple projects to reference. The output of the project is a .lib.
I created a new "ARM-GCC Library Empty Project". I have started including various header files I will need for my peripherals. Any of the XMC header files I call out cause an error. The XMC library isn't part of my includes path. How do I add it to it? All the examples just seems to work.
Thanks!
Very new to infineon microcontrollers and DAVE. Please be patient.
I have run through a couple examples and I think I understand enough of the XMC library. I decided to start writing my own library for multiple projects to reference. The output of the project is a .lib.
I created a new "ARM-GCC Library Empty Project". I have started including various header files I will need for my peripherals. Any of the XMC header files I call out cause an error. The XMC library isn't part of my includes path. How do I add it to it? All the examples just seems to work.
Thanks!
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ISO1I813T - PCB foot print , symbol and application note with code
Quote:
Originally Posted by nba
![View Post]()
The symbol & footprint is available for free download here. Just choose OrCad as the download format. Hope that helps.
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BGT24-RFB2412 Board USB Connection
Hello all,
the software for BGT24-RFB2412 is currently under development and not available yet. We are planning to release FSK and FMCW SW in the near future. So, please stay tuned.
Regarding debugging and flashing: I can confirm the prior statement that flashing via USB interface is not possible out of the box. An additional Segger J-Link compatible debugger needs to be used to flash and debug the MCU. E.g. you can use Infineon´s KIT_XMC_LINK_SEGGER_V1 (http://www.infineon.com/cms/en/produ...5023aeb65733b3).
Best regards,
Thomas
the software for BGT24-RFB2412 is currently under development and not available yet. We are planning to release FSK and FMCW SW in the near future. So, please stay tuned.
Regarding debugging and flashing: I can confirm the prior statement that flashing via USB interface is not possible out of the box. An additional Segger J-Link compatible debugger needs to be used to flash and debug the MCU. E.g. you can use Infineon´s KIT_XMC_LINK_SEGGER_V1 (http://www.infineon.com/cms/en/produ...5023aeb65733b3).
Best regards,
Thomas
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Problem with PWM_CCU8
Hi,
We have recently identified and fixed an issue in the PWM_CCUx APPs regarding the Stop function, e.g. the STx outputs are not reset.
An update of the APPs is planned for end of the month.
Regards,
Jesus
We have recently identified and fixed an issue in the PWM_CCUx APPs regarding the Stop function, e.g. the STx outputs are not reset.
An update of the APPs is planned for end of the month.
Regards,
Jesus
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TLV493 and 3D mag sensor eval kit availability
I have multiple TLV493 and 3D mag sensor eval kits. I measured the magnetic field density(MFD) by using one evalkit and its software 3Dsensor2Go.
I also want to use multiple evalkits and TLV493ds by using i2C.
Does someone have an example or can guide me into the right direction for the way of achieving this?
I'd really be gratefull.
thank you in advance!
I also want to use multiple evalkits and TLV493ds by using i2C.
Does someone have an example or can guide me into the right direction for the way of achieving this?
I'd really be gratefull.
thank you in advance!
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TLV493 and 3D mag sensor evalkit availability
I have multiple TLV493 and 3D mag sensor evalkits. I measured the magnetic field density(MFD) by using one evalkit and its software 3Dsensor2Go.
I also want to use multiple evalkits and TLV493ds by using i2C.
Does someone have an example or can guide me into the right direction for the way of achieving this?
I'd really be gratefull.
thank you in advance!
I also want to use multiple evalkits and TLV493ds by using i2C.
Does someone have an example or can guide me into the right direction for the way of achieving this?
I'd really be gratefull.
thank you in advance!
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Migrate option with ETHCAT_FWUPDATE_SSC_APPLICATION_XMC48
Hi,
we do not plan to create the firmware update example also for XMC4300.
I propose to start with the XMC4300-project of the basic example ETHCAT_SSC_XMC43.
All the code you than can take over from the firmware update example of XMC4800.
You just need to be careful about the smaller flash size on XMC4300.
Kind Regards
Michael
we do not plan to create the firmware update example also for XMC4300.
I propose to start with the XMC4300-project of the basic example ETHCAT_SSC_XMC43.
All the code you than can take over from the firmware update example of XMC4800.
You just need to be careful about the smaller flash size on XMC4300.
Kind Regards
Michael
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SPI DMA XMC4400 automatic slave select update
DAVE version 4.2.8
MCU: XMC4400-F100x512
SPI_MASTER APP version: 4.3.18
We are trying to setup a SPI Master communication via DMA to an external slave. Using the DAVE app SPI_MASTER, we can successfully setup the SPI communication with interrupt settings. When changing the configuration in the DAVE app to DMA on both RX and TX, the data sent and received becomes invalid.
We are also trying to set the Automatic Slave Select Update (chapter 15.4.3.3 in reference manual). This is not configurable in the DAVE app so we have added some modified code after the DAVE app initialization.
The configuration is setup as following:
After the DAVE_init(SPI_MASTER_0), the following code is executed: (We followed the information in chapter 15.4.3.3 in the reference manual)
The following problems then arise:
1) Hardware controlled Chip Select does not work when using DAVE app generated code.
Currently we modify the code by using Automatic Slave Select Update (chapter 15.4.3.3 in reference manual).
We modify the function SPI_MASTER_StartTransmitDMA() with the following:
The chip select is chosen by writing to the corresponding index in TXBUF[CHIP_SELECT_INDEX].
This is not handled in the DAVE app generated code.
Is this the correct approach?
2) The first transaction only sends NumberOfBytes - 1. It does not send the first byte for some reason. After the first transaction, it works well.
This is of course an error in the initialization of the SPI DMA (Dave app generated init code).
This is the code used for the first transaction:
Viewing the results (oscilloscope) on MOSI, CHIPSELECT and SCLK shows that only 0x02 and 0x03 are sent on the bus. CHIPSELECT works as it should.
We have not changed anything in the generated function SPI_MASTER_0_lInit(void). There is something in the initialization that is missing. What?
3) Waiting for the SPI_MASTER_0.runtime->tx_busy flag before sending the next frame does not work correctly.
The tx_busy flag will be set to false too early which causes the chip select line to not de-assert between two sent frames.
We are sending a couple of frames when setting up the slave chip. The chip select line must de-assert between these frames. We are sending the frames as follows (pseudocode):
Viewing the results on an oscilloscope show that the CHIP_SELECT line is never de-asserted between the frames. Further debugging shows that the tx_busy flag is set to false way too early, about 1,5 bytes before the actual frame transfer is completed. This will of course make the USIC module continue to write data on the bus without de-asserting the CHIP SELECT line.
We fixed this by modifying the DAVE generated code to wait for the MSLS (chip select active bit) to be reset before setting the tx_busy flag to false.
Is this the correct method to solve this?
Thanks!
MCU: XMC4400-F100x512
SPI_MASTER APP version: 4.3.18
We are trying to setup a SPI Master communication via DMA to an external slave. Using the DAVE app SPI_MASTER, we can successfully setup the SPI communication with interrupt settings. When changing the configuration in the DAVE app to DMA on both RX and TX, the data sent and received becomes invalid.
We are also trying to set the Automatic Slave Select Update (chapter 15.4.3.3 in reference manual). This is not configurable in the DAVE app so we have added some modified code after the DAVE app initialization.
The configuration is setup as following:
After the DAVE_init(SPI_MASTER_0), the following code is executed: (We followed the information in chapter 15.4.3.3 in the reference manual)
Code:
uint32_t mask = SPI_MASTER_0.channel->TCSR;
mask &= ~USIC_CH_TCSR_WLEMD_Msk;
mask &= ~USIC_CH_TCSR_FLEMD_Msk;
mask &= ~USIC_CH_TCSR_WAMD_Msk;
mask &= ~USIC_CH_TCSR_HPCMD_Msk;
mask |= USIC_CH_TCSR_SELMD_Msk;
SPI_MASTER_0.channel->TCSR = mask;
mask = SPI_MASTER_0.channel->PCR_SSCMode;
mask |= USIC_CH_PCR_SSCMode_MSLSEN_Msk;
mask |= USIC_CH_PCR_SSCMode_SELCTR_Msk;
mask |= USIC_CH_PCR_SSCMode_SELINV_Msk;
mask &= ~USIC_CH_PCR_SSCMode_FEM_Msk;
SPI_MASTER_0.channel->PCR_SSCMode = mask;1) Hardware controlled Chip Select does not work when using DAVE app generated code.
Currently we modify the code by using Automatic Slave Select Update (chapter 15.4.3.3 in reference manual).
We modify the function SPI_MASTER_StartTransmitDMA() with the following:
Code:
SPI_MASTER_STATUS_t SPI_MASTER_StartTransmitDMA(const SPI_MASTER_t *const handle, uint8_t *data_ptr, uint32_t block_size)
{
...
mode = 8; /* Set mode to 8 (TCI information will generate CHIPSELECT on P1.13 for USCI0 channel1)
XMC_DMA_CH_SetDestinationAddress(handle->global_dma->dma,
handle->dma_ch_tx_number,
(uint32_t)&(handle->channel->TBUF[mode]));
...
}This is not handled in the DAVE app generated code.
Is this the correct approach?
2) The first transaction only sends NumberOfBytes - 1. It does not send the first byte for some reason. After the first transaction, it works well.
This is of course an error in the initialization of the SPI DMA (Dave app generated init code).
This is the code used for the first transaction:
Code:
uint8_t spiTxBuf[3] = {0x01,0x02,0x03};
SPI_MASTER_Transmit(&SPI_MASTER_0, &spiTxBuf[0], 3);We have not changed anything in the generated function SPI_MASTER_0_lInit(void). There is something in the initialization that is missing. What?
3) Waiting for the SPI_MASTER_0.runtime->tx_busy flag before sending the next frame does not work correctly.
The tx_busy flag will be set to false too early which causes the chip select line to not de-assert between two sent frames.
We are sending a couple of frames when setting up the slave chip. The chip select line must de-assert between these frames. We are sending the frames as follows (pseudocode):
Code:
uint8_t spiTxBuf[3] = {0x01,0x02,0x03};
SPI_MASTER_STATUS_t status = SPI_MASTER_Transmit(&SPI_MASTER_0, spiTxBuf, 3);
while(SPI_MASTER_0.runtime->tx_busy){}
spiTxBuf[3] = {0x04,0x05,0x06};
SPI_MASTER_STATUS_t status = SPI_MASTER_Transmit(&SPI_MASTER_0, spiTxBuf, 3);
while(SPI_MASTER_0.runtime->tx_busy){}
spiTxBuf[3] = {0x09,0x0a,0x0b};
SPI_MASTER_STATUS_t status = SPI_MASTER_Transmit(&SPI_MASTER_0, spiTxBuf, 3);
while(SPI_MASTER_0.runtime->tx_busy){}We fixed this by modifying the DAVE generated code to wait for the MSLS (chip select active bit) to be reset before setting the tx_busy flag to false.
Code:
void SPI_MASTER_0_DMA_tx_handler(XMC_DMA_CH_EVENT_t event)
{
if (event == XMC_DMA_CH_EVENT_TRANSFER_COMPLETE)
{
while(SPI_MASTER_0.channel->PSR & USIC_CH_PSR_SSCMode_MSLS_Msk); // Wait until Chip select is deactivated
//while(XMC_USIC_CH_GetTransmitBufferStatus(XMC_SPI0_CH1) == XMC_USIC_CH_TBUF_STATUS_BUSY);
SPI_MASTER_0.runtime->tx_busy = false;
}
}Thanks!
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High side switches reverse battery protection
Hello!
Just found a great online store that sells quality battery, capacitors, insolators and every other electronic gadget one can think of. It is called WIN SOURCE. It is actually a super store....I will encourage you guys to check them out.
Just found a great online store that sells quality battery, capacitors, insolators and every other electronic gadget one can think of. It is called WIN SOURCE. It is actually a super store....I will encourage you guys to check them out.
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multiCAN setup confusion.
Thanks OMR.
I think it's using older API's, but I think I can work with this. I'll update more once I get some progress.
I think it's using older API's, but I think I can work with this. I'll update more once I get some progress.
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Problem using DAVE IDE as non-admin Windows user.
There's one way to fix this as a normal user, which is to log in as the Admin user and copy the entire Infineon folder from the Admin user's profile directory, to the normal user's profile directory. But this is more a hack than a good way to do things.
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Problems with EtherCAT DC-Sync Mode
Hello,
I am not able to start up the Ethercat Slave device (Relaxkit), when I enable DC-Sync Mode in Ethercat Master Configuration!
I created the EtherCAT Slave application with the newest tutorial and versions of DAVE and Ethercat Slave Source Stack Tool.
The tutorial ist very good, so there was no problem to bring up the slave demo on the Relax Kit.
When I run the Ethercat in FreeRun/SM-Sync Mode, everything is fine, but when changing to DC-Sync, the slaves fails in State Transition from SAVE-OP to OPERATIONAL.
I debugged already a while, but I am not able to find the reason for this behaviour!
Any Ideas?
Many Thanks
Richard
I am not able to start up the Ethercat Slave device (Relaxkit), when I enable DC-Sync Mode in Ethercat Master Configuration!
I created the EtherCAT Slave application with the newest tutorial and versions of DAVE and Ethercat Slave Source Stack Tool.
The tutorial ist very good, so there was no problem to bring up the slave demo on the Relax Kit.
When I run the Ethercat in FreeRun/SM-Sync Mode, everything is fine, but when changing to DC-Sync, the slaves fails in State Transition from SAVE-OP to OPERATIONAL.
I debugged already a while, but I am not able to find the reason for this behaviour!
Any Ideas?
Many Thanks
Richard
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Modbus TCP
Please help,
I tried to take exapmle "Modbus TCP XMC47" and change settings in ETH app from Enable to Disable.
But after re-generating code and re-compile -> there are 6 Errors in "porttimer.c" library.
... it seems not working without RTOS :(
Is there some workaround please?
Note: When this would be done, I supposed move contain of "void mbtcp_thread(void const *argument)" to main loop.
Regards,
Koumak
I tried to take exapmle "Modbus TCP XMC47" and change settings in ETH app from Enable to Disable.
But after re-generating code and re-compile -> there are 6 Errors in "porttimer.c" library.
... it seems not working without RTOS :(
Is there some workaround please?
Note: When this would be done, I supposed move contain of "void mbtcp_thread(void const *argument)" to main loop.
Regards,
Koumak
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Questions about BGT24-RFB2412 Reference Design Board - User Manual (AN380)
Dear finketho:
Thank you for your reply. I have an another question. Where can I learn more about BGT24MTR12 including the register description? Now I can only get the data sheet, "BGT24MTR12
Silicon Germanium 24 GHz Transceiver MMIC", but it does not provide any information about register. So, I can't use the chip.
Thank you very much!
Arron
Thank you for your reply. I have an another question. Where can I learn more about BGT24MTR12 including the register description? Now I can only get the data sheet, "BGT24MTR12
Silicon Germanium 24 GHz Transceiver MMIC", but it does not provide any information about register. So, I can't use the chip.
Thank you very much!
Arron
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HW controlled shift data input
What does "HW controlled shift data input" within the USIC Interconnects description stand for?
Does this mean, this pin can either be input OR output?
Thank you!
Does this mean, this pin can either be input OR output?
Thank you!
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Settings for DC-syncronous (or SM+SYNC0) mode
Quote:
Originally Posted by dvaidya
![View Post]()
Hello,
I was able to verify it from the ISR of SYNC0 and the slaves are observed to be in series. But I observed that if I reset/ disconnect one of the slaves (other than the first slave which is the reference clock for the etherCAT system)
then that slave does not get synced back to the network. I need to re scan from the twinCAT (PC) which is my master to get all of them synced again. Is there any feature I need to enable to avoid this?
Shouldn't this be done by the master automatically?
Thank you
I was able to verify it from the ISR of SYNC0 and the slaves are observed to be in series. But I observed that if I reset/ disconnect one of the slaves (other than the first slave which is the reference clock for the etherCAT system)
then that slave does not get synced back to the network. I need to re scan from the twinCAT (PC) which is my master to get all of them synced again. Is there any feature I need to enable to avoid this?
Shouldn't this be done by the master automatically?
Thank you
I tried to reproduce what you are saying using TwinCAT3 as a host, but I cannot confirm.
I've used two XMC4800 Relax Kits.
I've tested disconnecting/reconnecting RJ45, reset and complete power cycles of 2nd slave.
Always after some seconds the 2nd slave shows RUN-LED again static turned on and the slave is back in sync?!
Kind Regards
Michael.
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Dedicated Emulation Device chip term
Dave, thank you for your answer.
Unfortunately from about Jun 23rd, 2016 I am not able to get TC1791ED from anywhere and this is real problem for me. Luckly or not I can get TC1791S-384 F200EP AB where in PMU1 is 1MB PFlash instead 2MB comparing to 512 version.
Can you please refer me to some documents that will give some more data about PMU0 and PMU1, will memory address be different in both IC?
Thank you.
Unfortunately from about Jun 23rd, 2016 I am not able to get TC1791ED from anywhere and this is real problem for me. Luckly or not I can get TC1791S-384 F200EP AB where in PMU1 is 1MB PFlash instead 2MB comparing to 512 version.
Can you please refer me to some documents that will give some more data about PMU0 and PMU1, will memory address be different in both IC?
Thank you.
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